Defined in 5 files as a macro:

• drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h, line 5193 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h, line 5305 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h, line 6385 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h, line 7303 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h, line 4659 (as a macro)

Referenced in 6 files:

• drivers/gpu/drm/amd/amdgpu/dce_v10_0.c, line 3108
• drivers/gpu/drm/amd/amdgpu/dce_v6_0.c, line 3091
• drivers/gpu/drm/amd/amdgpu/dce_v8_0.c, line 3107
• drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c
  • line 126
  • line 127
• drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c
  • line 112
  • line 113
• drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c
  • line 103
  • line 104