| PARAM_VALUE |
0 |
par |
4096-ptr_max |
| BUF_SIZE |
0 |
par |
2,4,16,24,32,128,216,248,256,1288,1984,2560 |
| BUF_SIZE |
0 |
par |
2,4,16,24,32,128,216,248,256,1288,1984,2560 |
| DATA_SOURCE |
0 |
par |
$0 |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| NOCHECK_CALL |
|
|
|
| HOST_DATA |
0 |
par->current_state.ext.arbitration0 |
0-u32max |
| HOST_DATA |
0 |
par->current_state.ext.arbitration1 |
0-268435455 |
| HOST_DATA |
0 |
par->current_state.ext.config |
0-u32max |
| HOST_DATA |
0 |
par->current_state.ext.crtcOwner |
0-u32max |
| HOST_DATA |
0 |
par->current_state.ext.cursor0 |
128-32895 |
| HOST_DATA |
0 |
par->current_state.ext.cursor1 |
0,4-8388604 |
| HOST_DATA |
0 |
par->current_state.ext.cursor2 |
0-255 |
| HOST_DATA |
0 |
par->current_state.ext.dither |
0-u32max |
| HOST_DATA |
0 |
par->current_state.ext.extra |
0-u32max |
| HOST_DATA |
0 |
par->current_state.ext.head |
0-u32max |
| HOST_DATA |
0 |
par->current_state.ext.head2 |
0-u32max |
| HOST_DATA |
0 |
par->current_state.ext.height |
0-u32max |
| HOST_DATA |
0 |
par->current_state.ext.horiz |
0-u32max |
| HOST_DATA |
0 |
par->current_state.ext.interlace |
0,2-255 |
| HOST_DATA |
0 |
par->current_state.ext.pllsel |
268437248,805310208 |
| HOST_DATA |
0 |
par->current_state.ext.repaint0 |
0-224[c] |
| HOST_DATA |
0 |
par->current_state.ext.scale |
0-u32max |
| HOST_DATA |
0 |
par->current_state.ext.screen |
0-31[c] |
| HOST_DATA |
0 |
par->current_state.ext.vpll2 |
0-u32max |
| HOST_DATA |
0 |
par->current_state.ext.width |
0-u32max |
| HOST_DATA |
0 |
par->riva |
s64min-s64max |
| HOST_DATA |
0 |
par->riva.Architecture |
0-u32max |
| HOST_DATA |
0 |
par->riva.Chipset |
0-u32max |
| HOST_DATA |
0 |
par->riva.CrystalFreqKHz |
0-u32max |
| HOST_DATA |
0 |
par->riva.CurrentState->arbitration0 |
0-u32max |
| HOST_DATA |
0 |
par->riva.CurrentState->arbitration1 |
0-268435455,4026531840-u32max |
| HOST_DATA |
0 |
par->riva.CurrentState->config |
0-u32max |
| HOST_DATA |
0 |
par->riva.CurrentState->crtcOwner |
0-u32max |
| HOST_DATA |
0 |
par->riva.CurrentState->cursor0 |
128-32895 |
| HOST_DATA |
0 |
par->riva.CurrentState->cursor1 |
0,4-8388604 |
| HOST_DATA |
0 |
par->riva.CurrentState->cursor2 |
0-255 |
| HOST_DATA |
0 |
par->riva.CurrentState->dither |
0-u32max |
| HOST_DATA |
0 |
par->riva.CurrentState->extra |
0-u32max |
| HOST_DATA |
0 |
par->riva.CurrentState->head |
0-u32max |
| HOST_DATA |
0 |
par->riva.CurrentState->head2 |
0-u32max |
| HOST_DATA |
0 |
par->riva.CurrentState->height |
0-u32max |
| HOST_DATA |
0 |
par->riva.CurrentState->horiz |
0-u32max |
| HOST_DATA |
0 |
par->riva.CurrentState->interlace |
0,2-255 |
| HOST_DATA |
0 |
par->riva.CurrentState->pllsel |
268437248,805310208 |
| HOST_DATA |
0 |
par->riva.CurrentState->repaint0 |
0-224[c] |
| HOST_DATA |
0 |
par->riva.CurrentState->scale |
0-u32max |
| HOST_DATA |
0 |
par->riva.CurrentState->screen |
0-31[c] |
| HOST_DATA |
0 |
par->riva.CurrentState->vpll2 |
0-u32max |
| HOST_DATA |
0 |
par->riva.CurrentState->width |
0-u32max |
| HOST_DATA |
0 |
par->riva.CursorStart |
0-u32max |
| HOST_DATA |
0 |
par->riva.EnableIRQ |
0-u32max |
| HOST_DATA |
0 |
par->riva.FifoEmptyCount |
0-u32max |
| HOST_DATA |
0 |
par->riva.FifoFreeCount |
0 |
| HOST_DATA |
0 |
par->riva.IO |
0-u32max |
| HOST_DATA |
0 |
par->riva.MaxVClockFreqKHz |
0-u32max |
| HOST_DATA |
0 |
par->riva.RamAmountKBytes |
0-u32max |
| HOST_DATA |
0 |
par->riva.RamBandwidthKBytesPerSec |
0-u32max |
| HOST_DATA |
0 |
par->riva.VBlankBit |
0-u32max |
| HOST_DATA |
0 |
par->riva.Version |
0-u32max |
| HOST_DATA |
0 |
par->riva.flatPanel |
0-u32max |
| HOST_DATA |
0 |
par->riva.twoHeads |
s32min-s32max |
| NO_OVERFLOW_SIMPLE |
0 |
par->current_state.ext.height |
|
| NO_OVERFLOW_SIMPLE |
0 |
par->current_state.ext.width |
|
| NO_OVERFLOW_SIMPLE |
0 |
par->riva.CurrentState->height |
|
| NO_OVERFLOW_SIMPLE |
0 |
par->riva.CurrentState->width |
|
| UNITS |
0 |
par |
unit_byte |
| HALF_LOCKED2 |
|
&info->lock |
|
| HALF_LOCKED2 |
0 |
&par->open_lock |
|