Defined in 2 files as a function:
- drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c, line 544 (as a function)
- drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c, line 532 (as a function)
Referenced in 2 files:
- drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
- drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c, line 991
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/../ras/core/eeprom.c ras_eeprom_read() -> __decode_table_record_from_buf()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | control | 4096-ptr_max |
| PARAM_VALUE | 0 | control->ras_num_recs | 1-u32max |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.first_waiter->task->blocked_on | 0 |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 1 | record | 4096-ptr_max |
| BUF_SIZE | 0 | control | 504 |
| BUF_SIZE | 2 | buf | 24,u64max |
| BUF_SIZE | 2 | buf | 24,u64max |
| CAPPED_DATA | 0 | control->ras_max_record_count | 1 |
| CAPPED_DATA | 0 | &control->ras_tbl_mutex | 1 |
| RX_PATH | |||
| NOCHECK_CALL | |||
| LOCK2 | 0 | &control->ras_tbl_mutex | |
| TYPE_LOCK | (struct ras_eeprom_control)->ras_tbl_mutex |
drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c amdgpu_ras_debugfs_table_read() -> __decode_table_record_from_buf()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | control | 4096-ptr_max |
| PARAM_VALUE | 0 | control->ras_num_recs | 1-u32max |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 1 | record | 666788661660229632 |
| PARAM_VALUE | 2 | buf | 6094348786284089344 |
| BUF_SIZE | 0 | control | 480 |
| BUF_SIZE | 2 | buf | 24 |
| CAPPED_DATA | 0 | &control->ras_tbl_mutex | 1 |
| NOCHECK_CALL | |||
| LOCK2 | 0 | &control->ras_tbl_mutex | |
| TYPE_LOCK | (struct amdgpu_ras_eeprom_control)->ras_tbl_mutex |
drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c amdgpu_ras_eeprom_read() -> __decode_table_record_from_buf()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | control | 4096-ptr_max |
| PARAM_VALUE | 0 | control->i2c_address | 0,65536-196608,262144 |
| PARAM_VALUE | 0 | control->ras_info_offset | 0,20 |
| PARAM_VALUE | 0 | control->ras_max_record_count | 0,4000,10911,10921 |
| PARAM_VALUE | 0 | control->ras_num_recs | 1-u32max |
| PARAM_VALUE | 0 | control->ras_record_offset | 0,20,276 |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 1 | record | 4096-ptr_max |
| BUF_SIZE | 0 | control | 480 |
| BUF_SIZE | 2 | buf | 24,u64max |
| BUF_SIZE | 2 | buf | 24,u64max |
| CAPPED_DATA | 0 | control->ras_max_record_count | 1 |
| CAPPED_DATA | 0 | &control->ras_tbl_mutex | 1 |
| DATA_SOURCE | 0 | control | $0 |
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | control->ras_num_recs | |
| LOCK2 | 0 | &control->ras_tbl_mutex | |
| TYPE_LOCK | (struct amdgpu_ras_eeprom_control)->ras_tbl_mutex |