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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_get_if_enabled() -> __intel_display_power_is_enabled()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->cdclk.table->cdclk 0,79200,144000,151200,153600,158400,163200,172800,176000,176400,179200,180000,192000,201600,204000,211200,226800,230400,244800,249600,252000,268800,277200,285600,288000,302400,307200,312000,316800,324000,326400-4294967295
PARAM_VALUE 0 display->cdclk.table->ratio 0,9-10,14-41,46,50,52,54,58,60,64-65,68,92,108,116,136
PARAM_VALUE 0 display->cdclk.table->refclk 0,19200,24000,24400,38400
PARAM_VALUE 0 display->drm->huge_mnt->mnt_sb->s_cop->inode_info_offs 1632,1640,1720,1808,1816,2632,2640,2648,2704,2712
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 0 display->parent->pcode 600309631264055296
PARAM_VALUE 0 display->parent->rpm 4096-ptr_max
PARAM_VALUE 0 display->parent->rpm->get_if_in_use 4096-ptr_max
PARAM_VALUE 0 display->power.domains.lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 display->power.domains.lock.osq.tail.counter 0-s32max
PARAM_VALUE 0 display->power.domains.lock.wait_lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.wait_lock.owner (-1)
PARAM_VALUE 0 display->power.domains.lock.wait_lock.owner_cpu u32max
PARAM_VALUE 0 display->power.domains.power_wells->desc->irq_pipe_mask 0-2,4,6,8
PARAM_VALUE 0 *display->irq.pipestat_irq_mask 0-4294967295
DATA_SOURCE 0 display $0
DATA_SOURCE 1 domain $1
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 display->cdclk.hw.cdclk 0-39168016[c]
HOST_DATA 0 display->cdclk.hw.joined_mbus 0-1
HOST_DATA 0 display->cdclk.hw.voltage_level 0-31[c]
HOST_DATA 0 display->cdclk.max_cdclk_freq 1-39168016[c]
HOST_DATA 0 display->cdclk.max_dotclk_freq 0-32[c]
HOST_DATA 0 display->drm->mode_config.connector_ida.xa.xa_flags 67108869
HOST_DATA 0 display->drm->mode_config.object_idr.idr_rt.xa_flags 0,4-u32max
HOST_DATA 0 display->drm->mode_config.tile_idr.idr_rt.xa_flags 67108868
HOST_DATA 0 display->drm->num_crtcs 2[c]
HOST_DATA 0 display->fdi.pll_freq 20000-2570000[c]
HOST_DATA 0 display->fdi.rx_config 0,32768-98304[c]
HOST_DATA 0 display->power.domains.dc_state 0-u32max
HOST_DATA 0 display->state.bxt_phy_grc 0-u32max
HOST_DATA 0 display->vbt.lvds_use_ssc 0-1
HOST_DATA 0 display->wm.g4x.cxsr 0-1
HOST_DATA 0 display->wm.g4x.hpll.cursor 0-63[c]
HOST_DATA 0 display->wm.g4x.hpll.fbc 0-15[c]
HOST_DATA 0 display->wm.g4x.hpll.plane 0-511[c]
HOST_DATA 0 display->wm.g4x.sr.cursor 0-63[c]
HOST_DATA 0 display->wm.g4x.sr.fbc 0-7[c]
HOST_DATA 0 display->wm.g4x.sr.plane 0-511
HOST_DATA 0 display->wm.vlv.cxsr 0-1
HOST_DATA 0 display->wm.vlv.sr.cursor 0-63[c]
HOST_DATA 0 display->wm.vlv.sr.plane 0-2047[c]
NO_OVERFLOW_SIMPLE 0 display->drm->num_crtcs
LOCK2 &power_domains->lock
HALF_LOCKED2 &dig_port->hdcp.mutex
HALF_LOCKED2 &hdcp->mutex
HALF_LOCKED2 0 &display->dpll.lock
HALF_LOCKED2 0 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 0 &display->drm->mode_config.mutex
TYPE_LOCK (struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_is_enabled() -> __intel_display_power_is_enabled()

Type Parameter Key Value
PARAM_VALUE 0 display->power.domains.lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 display->power.domains.lock.osq.tail.counter 0-s32max
PARAM_VALUE 0 display->power.domains.lock.wait_lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.wait_lock.owner (-1)
PARAM_VALUE 0 display->power.domains.lock.wait_lock.owner_cpu u32max
BUF_SIZE 0 display (-1),8128
BUF_SIZE 0 display (-1),8128
DATA_SOURCE 0 display $0
DATA_SOURCE 1 domain $1
RX_PATH
TASK_NOT_RUNNING
LOCK2 &power_domains->lock
HALF_LOCKED2 &display->dpll.lock
HALF_LOCKED2 &tc->lock
TYPE_LOCK (struct i915_power_domains)->lock