Defined in 2 files as a function:
- drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c, line 1438 (as a function)
- drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c, line 1073 (as a function)
Referenced in 2 files:
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/../ras/core/eeprom.c ras_eeprom_check_storage_status() -> __read_table_ras_info()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | control | 4096-ptr_max |
| PARAM_VALUE | 0 | control->bad_channel_bitmap | 0 |
| PARAM_VALUE | 0 | control->i2c_address | 0,65536-196608,262144 |
| PARAM_VALUE | 0 | control->i2c_port | 0 |
| PARAM_VALUE | 0 | control->ras_fri | 0-10920 |
| PARAM_VALUE | 0 | control->ras_header_offset | 0 |
| PARAM_VALUE | 0 | control->ras_info_offset | 0,20 |
| PARAM_VALUE | 0 | control->ras_max_record_count | 0,10911,10921 |
| PARAM_VALUE | 0 | control->ras_num_recs | 0-10921 |
| PARAM_VALUE | 0 | control->ras_record_offset | 0,20,276 |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | control->record_threshold_count | 0-10911 |
| PARAM_VALUE | 0 | control->sys_func | 2258965604344324096 |
| PARAM_VALUE | 0 | control->tbl_hdr.header | 1095582802 |
| PARAM_VALUE | 0 | control->tbl_hdr.version | 135168-u32max |
| PARAM_VALUE | 0 | control->tbl_rai.health_percent | 0,100 |
| PARAM_VALUE | 0 | control->tbl_rai.rma_status | 0-1 |
| BUF_SIZE | 0 | control | 504 |
| FUZZY_MAX | 0 | control->tbl_hdr.version | 135168 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/../ras/core/eeprom.c ras_eeprom_check_storage_status() -> __read_table_ras_info()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | control | 4096-ptr_max |
| PARAM_VALUE | 0 | control->bad_channel_bitmap | 0 |
| PARAM_VALUE | 0 | control->i2c_address | 0,65536-196608,262144 |
| PARAM_VALUE | 0 | control->i2c_port | 0 |
| PARAM_VALUE | 0 | control->ras_fri | 0-10920 |
| PARAM_VALUE | 0 | control->ras_header_offset | 0 |
| PARAM_VALUE | 0 | control->ras_info_offset | 0,20 |
| PARAM_VALUE | 0 | control->ras_max_record_count | 0,10911,10921 |
| PARAM_VALUE | 0 | control->ras_num_recs | 0-10921 |
| PARAM_VALUE | 0 | control->ras_record_offset | 0,20,276 |
| PARAM_VALUE | 0 | control->ras_tbl_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | control->record_threshold_config | s32min-(-1),1-s32max |
| PARAM_VALUE | 0 | control->record_threshold_count | 0-10911 |
| PARAM_VALUE | 0 | control->sys_func | 2258965604344324096 |
| PARAM_VALUE | 0 | control->tbl_hdr.header | 1111573575 |
| PARAM_VALUE | 0 | control->tbl_hdr.version | 135168-u32max |
| PARAM_VALUE | 0 | control->tbl_rai.health_percent | 0,100 |
| PARAM_VALUE | 0 | control->tbl_rai.rma_status | 0-1 |
| BUF_SIZE | 0 | control | 504 |
| FUZZY_MAX | 0 | control->tbl_hdr.version | 135168 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c amdgpu_ras_eeprom_check() -> __read_table_ras_info()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | control | 4096-ptr_max |
| PARAM_VALUE | 0 | control->i2c_address | 0,65536-196608,262144 |
| PARAM_VALUE | 0 | control->ras_info_offset | 0,20 |
| PARAM_VALUE | 0 | control->ras_max_record_count | 0,4000,10911,10921 |
| PARAM_VALUE | 0 | control->ras_num_recs | 1-u32max |
| PARAM_VALUE | 0 | control->ras_record_offset | 0,20,276 |
| PARAM_VALUE | 0 | control->tbl_hdr.header | 1095582802 |
| PARAM_VALUE | 0 | control->tbl_hdr.version | 135168-u32max |
| BUF_SIZE | 0 | control | 480 |
| CAPPED_DATA | 0 | control->ras_max_record_count | 1 |
| CAPPED_DATA | 0 | control->ras_num_recs | 1 |
| DATA_SOURCE | 0 | control | $0 |
| FUZZY_MAX | 0 | control->tbl_hdr.version | 135168 |
| NO_OVERFLOW_SIMPLE | 0 | control->ras_num_recs |
drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c amdgpu_ras_eeprom_check() -> __read_table_ras_info()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | control | 4096-ptr_max |
| PARAM_VALUE | 0 | control->i2c_address | 0,65536-196608,262144 |
| PARAM_VALUE | 0 | control->ras_info_offset | 0,20 |
| PARAM_VALUE | 0 | control->ras_max_record_count | 0,4000,10911,10921 |
| PARAM_VALUE | 0 | control->ras_num_recs | 1-u32max |
| PARAM_VALUE | 0 | control->ras_record_offset | 0,20,276 |
| PARAM_VALUE | 0 | control->tbl_hdr.header | 1111573575 |
| PARAM_VALUE | 0 | control->tbl_hdr.version | 135168-u32max |
| BUF_SIZE | 0 | control | 480 |
| CAPPED_DATA | 0 | control->ras_max_record_count | 1 |
| CAPPED_DATA | 0 | control->ras_num_recs | 1 |
| DATA_SOURCE | 0 | control | $0 |
| FUZZY_MAX | 0 | control->tbl_hdr.version | 135168 |
| NO_OVERFLOW_SIMPLE | 0 | control->ras_num_recs |