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Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 5 files:

Smatch caller information:

drivers/gpu/drm/msm/adreno/a8xx_preempt.c a8xx_preempt_trigger() -> a6xx_fenced_write()

Type Parameter Key Value
PARAM_VALUE 0 a6xx_gpu 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->cur_ring 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->eval_lock.rlock.dep_map->name 0-255
PARAM_VALUE 0 a6xx_gpu->preempt 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_smmu 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_smmu_iova 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_state.counter 0-s32max
PARAM_VALUE 1 offset 2241
PARAM_VALUE 2 value 1-u64max
PARAM_VALUE 3 mask 2
PARAM_VALUE 4 is_64b 1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &gpu->lock
HALF_LOCKED2 _T->lock

drivers/gpu/drm/msm/adreno/a8xx_preempt.c a8xx_preempt_trigger() -> a6xx_fenced_write()

Type Parameter Key Value
PARAM_VALUE 0 a6xx_gpu 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->cur_ring 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->eval_lock.rlock.dep_map->name 0-255
PARAM_VALUE 0 a6xx_gpu->preempt 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_iova 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_smmu 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_smmu_iova 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_state.counter 0-s32max
PARAM_VALUE 1 offset 2243
PARAM_VALUE 2 value 1-u64max
PARAM_VALUE 3 mask 2
PARAM_VALUE 4 is_64b 1
CAPPED_DATA 0 a6xx_gpu->cur_ring 1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &gpu->lock
HALF_LOCKED2 _T->lock

drivers/gpu/drm/msm/adreno/a8xx_preempt.c a8xx_preempt_trigger() -> a6xx_fenced_write()

Type Parameter Key Value
PARAM_VALUE 0 a6xx_gpu 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->cur_ring 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->eval_lock.rlock.dep_map->name 0-255
PARAM_VALUE 0 a6xx_gpu->next_ring 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->next_ring->memptrs 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->next_ring->restore_wptr 0
PARAM_VALUE 0 a6xx_gpu->preempt 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_iova 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_smmu 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_smmu_iova 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_state.counter 3
PARAM_VALUE 0 a6xx_gpu->preempt_timer.entry->pprev 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_timer.entry.pprev 0,4096-ptr_max
PARAM_VALUE 1 offset 2240
PARAM_VALUE 2 value 1-961
PARAM_VALUE 3 mask 2
PARAM_VALUE 4 is_64b 0
CAPPED_DATA 0 a6xx_gpu->cur_ring 1
CAPPED_DATA 0 &a6xx_gpu->preempt_timer 1
BIT_INFO 2 value 0x1,0x3ff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &gpu->lock
HALF_LOCKED2 _T->lock

drivers/gpu/drm/msm/adreno/a8xx_preempt.c update_wptr() -> a6xx_fenced_write()

Type Parameter Key Value
PARAM_VALUE 0 a6xx_gpu 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_state.counter 2
PARAM_VALUE 1 offset 2055
PARAM_VALUE 3 mask 1
PARAM_VALUE 4 is_64b 0
DATA_SOURCE 0 a6xx_gpu $0
DATA_SOURCE 2 value r get_wptr
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &ring->preempt_lock
LOCK2 flags
HALF_LOCKED2 _T->lock
HALF_LOCKED2 flags
HALF_LOCKED2 0 &a6xx_gpu->eval_lock
TYPE_LOCK (struct msm_ringbuffer)->preempt_lock

drivers/gpu/drm/msm/adreno/a6xx_preempt.c a6xx_preempt_trigger() -> a6xx_fenced_write()

Type Parameter Key Value
PARAM_VALUE 0 a6xx_gpu 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->cur_ring 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->eval_lock.rlock.dep_map->name 0-255
PARAM_VALUE 0 a6xx_gpu->preempt 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_smmu 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_smmu_iova 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_state.counter 0-s32max
PARAM_VALUE 1 offset 2209
PARAM_VALUE 2 value 1-u64max
PARAM_VALUE 3 mask 2
PARAM_VALUE 4 is_64b 1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &gpu->lock
HALF_LOCKED2 _T->lock

drivers/gpu/drm/msm/adreno/a6xx_preempt.c a6xx_preempt_trigger() -> a6xx_fenced_write()

Type Parameter Key Value
PARAM_VALUE 0 a6xx_gpu 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->cur_ring 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->eval_lock.rlock.dep_map->name 0-255
PARAM_VALUE 0 a6xx_gpu->preempt 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_iova 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_smmu 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_smmu_iova 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_state.counter 0-s32max
PARAM_VALUE 1 offset 2211
PARAM_VALUE 2 value 1-u64max
PARAM_VALUE 3 mask 2
PARAM_VALUE 4 is_64b 1
CAPPED_DATA 0 a6xx_gpu->cur_ring 1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &gpu->lock
HALF_LOCKED2 _T->lock

drivers/gpu/drm/msm/adreno/a6xx_preempt.c a6xx_preempt_trigger() -> a6xx_fenced_write()

Type Parameter Key Value
PARAM_VALUE 0 a6xx_gpu 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->cur_ring 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->eval_lock.rlock.dep_map->name 0-255
PARAM_VALUE 0 a6xx_gpu->next_ring 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->next_ring->memptrs 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->next_ring->restore_wptr 0
PARAM_VALUE 0 a6xx_gpu->preempt 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_iova 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_smmu 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_smmu_iova 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_state.counter 3
PARAM_VALUE 0 a6xx_gpu->preempt_timer.entry->pprev 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_timer.entry.pprev 0,4096-ptr_max
PARAM_VALUE 1 offset 2208
PARAM_VALUE 2 value 1-961
PARAM_VALUE 3 mask 2
PARAM_VALUE 4 is_64b 0
CAPPED_DATA 0 a6xx_gpu->cur_ring 1
CAPPED_DATA 0 &a6xx_gpu->preempt_timer 1
BIT_INFO 2 value 0x1,0x3ff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &gpu->lock
HALF_LOCKED2 _T->lock

drivers/gpu/drm/msm/adreno/a6xx_preempt.c update_wptr() -> a6xx_fenced_write()

Type Parameter Key Value
PARAM_VALUE 0 a6xx_gpu 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_state.counter 2
PARAM_VALUE 1 offset 2055
PARAM_VALUE 3 mask 1
PARAM_VALUE 4 is_64b 0
DATA_SOURCE 0 a6xx_gpu $0
DATA_SOURCE 2 value r get_wptr
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &ring->preempt_lock
LOCK2 flags
HALF_LOCKED2 _T->lock
HALF_LOCKED2 flags
HALF_LOCKED2 0 &a6xx_gpu->eval_lock
TYPE_LOCK (struct msm_ringbuffer)->preempt_lock

drivers/gpu/drm/msm/adreno/a8xx_gpu.c a8xx_flush() -> a6xx_fenced_write()

Type Parameter Key Value
PARAM_VALUE 0 a6xx_gpu 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->cur_ring 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_state.counter 0,2
PARAM_VALUE 1 offset 2055
PARAM_VALUE 3 mask 1
PARAM_VALUE 4 is_64b 0
CAPPED_DATA 0 a6xx_gpu->cur_ring 1
DATA_SOURCE 2 value r get_wptr
PREEMPT_ADD <- disables preempt
NOCHECK_CALL
LOCK2 &ring->preempt_lock
LOCK2 flags
TYPE_LOCK (struct msm_ringbuffer)->preempt_lock

drivers/gpu/drm/msm/adreno/a6xx_gpu.c a6xx_flush() -> a6xx_fenced_write()

Type Parameter Key Value
PARAM_VALUE 0 a6xx_gpu 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->cur_ring 4096-ptr_max
PARAM_VALUE 0 a6xx_gpu->preempt_state.counter 0,2
PARAM_VALUE 1 offset 2055
PARAM_VALUE 3 mask 1
PARAM_VALUE 4 is_64b 0
CAPPED_DATA 0 a6xx_gpu->cur_ring 1
DATA_SOURCE 2 value r get_wptr
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &ring->preempt_lock
LOCK2 flags
HALF_LOCKED2 &a6xx_gpu->gmu.lock
HALF_LOCKED2 &gpu->lock
TYPE_LOCK (struct msm_ringbuffer)->preempt_lock