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Documented in 1 files:

Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 4 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/soc21.c soc21_asic_reset() -> amdgpu_device_pci_reset()

Type Parameter Key Value
PARAM_VALUE 0 adev 4096-ptr_max
PARAM_VALUE 0 adev->dev 0,4096-ptr_max
PARAM_VALUE 0 adev->dev->bus 0,4096-ptr_max
PARAM_VALUE 0 adev->dev->class 0,4096-ptr_max
PARAM_VALUE 0 adev->dev->driver 0,4096-ptr_max
PARAM_VALUE 0 adev->reset_domain->sem.first_waiter->handoff_set 0-1
PARAM_VALUE 0 adev->reset_domain->sem.first_waiter->type 0-1
BUF_SIZE 0 adev->dev (-1),1616
BUF_SIZE 0 adev->pdev (-1),1-s32max
BUF_SIZE 0 adev->reset_domain (-1),192
CAPPED_DATA 0 adev 1
DATA_SOURCE 0 adev $0
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 adev->gmc.visible_vram_size 0-4503599626321920[c]
HOST_DATA 0 adev->gmc.xgmi.node_segment_size 0,16777216-2199006478336[c]
HOST_DATA 0 adev->psp.sos.fw_version 0-u32max
HOST_DATA 0 adev->virt.fw_reserve.checksum_key 0-u32max
HOST_DATA 0 adev->virt.init_data_header.offset 0-u32max
HOST_DATA 0 adev->virt.init_data_header.size_kb 0-u32max
NO_OVERFLOW_SIMPLE 0 adev->mode_info.num_crtc
HALF_LOCKED2 &adev->reset_domain->sem
HALF_LOCKED2 &hive->tb.enter_turnstile
HALF_LOCKED2 &hive->tb.exit_turnstile

drivers/gpu/drm/amd/amdgpu/nv.c nv_asic_reset() -> amdgpu_device_pci_reset()

Type Parameter Key Value
PARAM_VALUE 0 adev 4096-ptr_max
PARAM_VALUE 0 adev->asic_funcs 4096-ptr_max
PARAM_VALUE 0 adev->dev 0,4096-ptr_max
PARAM_VALUE 0 adev->dev->bus 0,4096-ptr_max
PARAM_VALUE 0 adev->dev->class 0,4096-ptr_max
PARAM_VALUE 0 adev->dev->driver 0,4096-ptr_max
BUF_SIZE 0 adev->dev (-1),1616
BUF_SIZE 0 adev->pdev (-1),1-s32max
BUF_SIZE 0 adev->reset_domain (-1),192
CAPPED_DATA 0 adev 1
DATA_SOURCE 0 adev $0
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 adev->gmc.visible_vram_size 0-4503599626321920[c]
HOST_DATA 0 adev->gmc.xgmi.node_segment_size 0,16777216-2199006478336[c]
HOST_DATA 0 adev->psp.sos.fw_version 0-u32max
HOST_DATA 0 adev->virt.fw_reserve.checksum_key 0-u32max
HOST_DATA 0 adev->virt.init_data_header.offset 0-u32max
HOST_DATA 0 adev->virt.init_data_header.size_kb 0-u32max
NO_OVERFLOW_SIMPLE 0 adev->mode_info.num_crtc
HALF_LOCKED2 &adev->reset_domain->sem
HALF_LOCKED2 &hive->tb.enter_turnstile
HALF_LOCKED2 &hive->tb.exit_turnstile

drivers/gpu/drm/amd/amdgpu/soc15.c soc15_asic_reset() -> amdgpu_device_pci_reset()

Type Parameter Key Value
PARAM_VALUE 0 adev 4096-ptr_max
PARAM_VALUE 0 adev->dev 0,4096-ptr_max
PARAM_VALUE 0 adev->dev->bus 0,4096-ptr_max
PARAM_VALUE 0 adev->dev->class 0,4096-ptr_max
PARAM_VALUE 0 adev->dev->driver 0,4096-ptr_max
BUF_SIZE 0 adev->dev (-1),1616
BUF_SIZE 0 adev->pdev (-1),1-s32max
BUF_SIZE 0 adev->reset_domain (-1),192
CAPPED_DATA 0 adev 1
DATA_SOURCE 0 adev $0
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 adev->gmc.visible_vram_size 0-4503599626321920[c]
HOST_DATA 0 adev->gmc.xgmi.node_segment_size 0,16777216-2199006478336[c]
HOST_DATA 0 adev->psp.sos.fw_version 0-u32max
HOST_DATA 0 adev->virt.fw_reserve.checksum_key 0-u32max
HOST_DATA 0 adev->virt.init_data_header.offset 0-u32max
HOST_DATA 0 adev->virt.init_data_header.size_kb 0-u32max
NO_OVERFLOW_SIMPLE 0 adev->mode_info.num_crtc
HALF_LOCKED2 &adev->reset_domain->sem
HALF_LOCKED2 &hive->tb.enter_turnstile
HALF_LOCKED2 &hive->tb.exit_turnstile

drivers/gpu/drm/amd/amdgpu/si.c si_asic_reset() -> amdgpu_device_pci_reset()

Type Parameter Key Value
PARAM_VALUE 0 adev 4096-ptr_max
PARAM_VALUE 0 adev->asic_funcs 4096-ptr_max
PARAM_VALUE 0 adev->dev 0,4096-ptr_max
PARAM_VALUE 0 adev->dev->bus 0,4096-ptr_max
PARAM_VALUE 0 adev->dev->class 0,4096-ptr_max
PARAM_VALUE 0 adev->dev->driver 0,4096-ptr_max
BUF_SIZE 0 adev->dev (-1),1616
BUF_SIZE 0 adev->pdev (-1),1-s32max
BUF_SIZE 0 adev->reset_domain (-1),192
CAPPED_DATA 0 adev 1
DATA_SOURCE 0 adev $0
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 adev->gmc.visible_vram_size 0-4503599626321920[c]
HOST_DATA 0 adev->gmc.xgmi.node_segment_size 0,16777216-2199006478336[c]
HOST_DATA 0 adev->psp.sos.fw_version 0-u32max
HOST_DATA 0 adev->virt.fw_reserve.checksum_key 0-u32max
HOST_DATA 0 adev->virt.init_data_header.offset 0-u32max
HOST_DATA 0 adev->virt.init_data_header.size_kb 0-u32max
NO_OVERFLOW_SIMPLE 0 adev->mode_info.num_crtc
HALF_LOCKED2 &adev->reset_domain->sem
HALF_LOCKED2 &hive->tb.enter_turnstile
HALF_LOCKED2 &hive->tb.exit_turnstile

drivers/gpu/drm/amd/amdgpu/soc24.c soc24_asic_reset() -> amdgpu_device_pci_reset()

Type Parameter Key Value
PARAM_VALUE 0 adev 4096-ptr_max
PARAM_VALUE 0 adev->dev 0,4096-ptr_max
PARAM_VALUE 0 adev->dev->bus 0,4096-ptr_max
PARAM_VALUE 0 adev->dev->class 0,4096-ptr_max
PARAM_VALUE 0 adev->dev->driver 0,4096-ptr_max
PARAM_VALUE 0 adev->reset_domain->sem.first_waiter->handoff_set 0-1
PARAM_VALUE 0 adev->reset_domain->sem.first_waiter->type 0-1
BUF_SIZE 0 adev->dev (-1),1616
BUF_SIZE 0 adev->pdev (-1),1-s32max
BUF_SIZE 0 adev->reset_domain (-1),192
CAPPED_DATA 0 adev 1
DATA_SOURCE 0 adev $0
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 adev->gmc.visible_vram_size 0-4503599626321920[c]
HOST_DATA 0 adev->gmc.xgmi.node_segment_size 0,16777216-2199006478336[c]
HOST_DATA 0 adev->psp.sos.fw_version 0-u32max
HOST_DATA 0 adev->virt.fw_reserve.checksum_key 0-u32max
HOST_DATA 0 adev->virt.init_data_header.offset 0-u32max
HOST_DATA 0 adev->virt.init_data_header.size_kb 0-u32max
NO_OVERFLOW_SIMPLE 0 adev->mode_info.num_crtc
HALF_LOCKED2 &adev->reset_domain->sem
HALF_LOCKED2 &hive->tb.enter_turnstile
HALF_LOCKED2 &hive->tb.exit_turnstile