Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 6 files:
- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c, line 5049
- drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c, line 1996
- drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c, line 1671
- drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c, line 1600
- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c, line 2489
- drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c, line 1141
Smatch caller information:
19f4aff6129bc862 gfx_v9_0_sw_fini() -> amdgpu_gfx_sysfs_fini()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->gfx.ce_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.kiq | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->gfx.me_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec.hpd_eop_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec.mec_fw_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec2_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.num_compute_rings | 0-s32max |
| PARAM_VALUE | 0 | adev->gfx.num_gfx_rings | 0-s32max |
| PARAM_VALUE | 0 | adev->gfx.pfp_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.clear_state_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc_fw | 0 |
| CAPPED_DATA | 0 | adev->gfx.num_compute_rings | 1 |
| CAPPED_DATA | 0 | adev->gfx.num_gfx_rings | 1 |
| CAPPED_DATA | 0 | adev->gfx.rlc.register_list_format | 1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | _T->lock | ||
| HALF_LOCKED2 | global &component_mutex | ||
| HALF_LOCKED2 | global &xenwatch_mutex |
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c gfx_v9_4_3_sw_fini() -> amdgpu_gfx_sysfs_fini()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->gfx.ce_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.me_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec.hpd_eop_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec.mec_fw_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec2_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.pfp_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.clear_state_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc_fw | 0 |
| CAPPED_DATA | 0 | adev->gfx.rlc.register_list_format | 1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | _T->lock | ||
| HALF_LOCKED2 | global &component_mutex | ||
| HALF_LOCKED2 | global &xenwatch_mutex |
2424e8ec9bf51854 gfx_v12_0_sw_fini() -> amdgpu_gfx_sysfs_fini()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->gfx.me.me_fw_data_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.me.me_fw_data_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.me.me_fw_data_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.me.me_fw_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.me.me_fw_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.me.me_fw_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.me_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec.hpd_eop_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec.mec_fw_data_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec.mec_fw_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.num_compute_rings | 0-s32max |
| PARAM_VALUE | 0 | adev->gfx.num_gfx_rings | 0-s32max |
| PARAM_VALUE | 0 | adev->gfx.pfp.pfp_fw_data_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.pfp.pfp_fw_data_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.pfp.pfp_fw_data_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.pfp.pfp_fw_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.pfp.pfp_fw_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.pfp.pfp_fw_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.pfp_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.clear_state_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.clear_state_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.cp_table_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.cp_table_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.cp_table_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.cs_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.userq_priv_fault_work.lockdep_map->name | 0-255 |
| CAPPED_DATA | 0 | adev->gfx.num_compute_rings | 1 |
| CAPPED_DATA | 0 | adev->gfx.num_gfx_rings | 1 |
| CAPPED_DATA | 0 | adev->gfx.rlc.register_list_format | 1 |
| CAPPED_DATA | 0 | &adev->gfx.userq_priv_fault_work | 1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | _T->lock | ||
| HALF_LOCKED2 | global &component_mutex | ||
| HALF_LOCKED2 | global &xenwatch_mutex |
28ad57647bf6154f gfx_v11_0_sw_fini() -> amdgpu_gfx_sysfs_fini()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->gfx.me.me_fw_data_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.me.me_fw_data_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.me.me_fw_data_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.me.me_fw_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.me.me_fw_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.me.me_fw_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.me_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec.hpd_eop_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec.mec_fw_data_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec.mec_fw_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.num_compute_rings | 0-s32max |
| PARAM_VALUE | 0 | adev->gfx.num_gfx_rings | 0-s32max |
| PARAM_VALUE | 0 | adev->gfx.pfp.pfp_fw_data_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.pfp.pfp_fw_data_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.pfp.pfp_fw_data_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.pfp.pfp_fw_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.pfp.pfp_fw_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.pfp.pfp_fw_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.pfp_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.clear_state_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.clear_state_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.cp_table_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.cp_table_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.cp_table_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.cs_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.userq_priv_fault_work.lockdep_map->name | 0-255 |
| CAPPED_DATA | 0 | adev->gfx.num_compute_rings | 1 |
| CAPPED_DATA | 0 | adev->gfx.num_gfx_rings | 1 |
| CAPPED_DATA | 0 | adev->gfx.rlc.register_list_format | 1 |
| CAPPED_DATA | 0 | &adev->gfx.userq_priv_fault_work | 1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | _T->lock | ||
| HALF_LOCKED2 | global &component_mutex | ||
| HALF_LOCKED2 | global &xenwatch_mutex |
3d756af95eb3bd31 gfx_v12_1_sw_fini() -> amdgpu_gfx_sysfs_fini()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->gfx.mec.hpd_eop_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec.mec_fw_data_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec.mec_fw_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.clear_state_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.clear_state_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.cp_table_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.cp_table_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.cp_table_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.cs_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc_fw | 0 |
| CAPPED_DATA | 0 | adev->gfx.rlc.register_list_format | 1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | _T->lock | ||
| HALF_LOCKED2 | global &component_mutex | ||
| HALF_LOCKED2 | global &xenwatch_mutex |
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_sw_fini() -> amdgpu_gfx_sysfs_fini()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->gfx.ce.ce_fw_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.ce.ce_fw_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.ce.ce_fw_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.ce_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.kiq | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->gfx.me.me_fw_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.me.me_fw_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.me.me_fw_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.me_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec.hpd_eop_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec.mec_fw_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec2_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.mec_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.num_compute_rings | 0-s32max |
| PARAM_VALUE | 0 | adev->gfx.num_gfx_rings | 0-s32max |
| PARAM_VALUE | 0 | adev->gfx.pfp.pfp_fw_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.pfp.pfp_fw_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.pfp.pfp_fw_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.pfp_fw | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.clear_state_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.clear_state_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.cp_table_gpu_addr | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.cp_table_obj | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.cp_table_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc.cs_ptr | 0 |
| PARAM_VALUE | 0 | adev->gfx.rlc_fw | 0 |
| CAPPED_DATA | 0 | adev->gfx.num_compute_rings | 1 |
| CAPPED_DATA | 0 | adev->gfx.num_gfx_rings | 1 |
| CAPPED_DATA | 0 | adev->gfx.rlc.register_list_format | 1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | _T->lock | ||
| HALF_LOCKED2 | global &component_mutex | ||
| HALF_LOCKED2 | global &xenwatch_mutex |