Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 2 files:
- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
- drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c, line 2302
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c amdgpu_gfx_kiq_acquire() -> amdgpu_queue_mask_bit_to_mec_queue()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 1 | bit | 0-s32max |
| PARAM_VALUE | 2 | mec | 3428123762950283264 |
| PARAM_VALUE | 3 | pipe | 215448533732368384 |
| PARAM_VALUE | 4 | queue | 6302764062929301504 |
| DATA_SOURCE | 0 | adev | $0 |
| FUZZY_MAX | 1 | bit | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | adev->gfx.bad_op_irq.num_types | |
| NO_OVERFLOW_SIMPLE | 0 | adev->gfx.cp_ecc_error_irq.num_types | |
| NO_OVERFLOW_SIMPLE | 0 | adev->gfx.eop_irq.num_types | |
| NO_OVERFLOW_SIMPLE | 0 | adev->gfx.muxer.ring_entry_size | |
| NO_OVERFLOW_SIMPLE | 0 | adev->gfx.priv_inst_irq.num_types | |
| NO_OVERFLOW_SIMPLE | 0 | adev->gfx.priv_reg_irq.num_types | |
| NO_OVERFLOW_SIMPLE | 0 | adev->gfx.rlc_poison_irq.num_types | |
| NO_OVERFLOW_SIMPLE | 0 | adev->gfx.sq_irq.num_types |
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c amdgpu_queue_mask_bit_to_set_resource_bit() -> amdgpu_queue_mask_bit_to_mec_queue()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 1 | bit | 0-64 |
| PARAM_VALUE | 2 | mec | 1790038515482816512 |
| PARAM_VALUE | 3 | pipe | 3957666569091244032 |
| PARAM_VALUE | 4 | queue | 4773044110646632448 |
| DATA_SOURCE | 0 | adev | $0 |
| DATA_SOURCE | 1 | bit | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | adev->gfx.config.db_debug2 | 0-u32max |
| HOST_DATA | 0 | adev->gfx.config.mc_arb_ramcfg | 0-u32max |
| HOST_DATA | 0 | adev->gfx.num_xcc_per_xcp | 0-15[c] |
| HOST_DATA | 0 | adev->xcp_mgr->adev->discovery.debugfs_blob.size | 1-u32max |
| HOST_DATA | 0 | adev->xcp_mgr->adev->discovery.offset | 0-u64max |
| HOST_DATA | 0 | adev->xcp_mgr->adev->discovery.size | 1-u32max |
| HOST_DATA | 0 | adev->xcp_mgr->adev->virt.fw_reserve.checksum_key | 0-u32max |
| HOST_DATA | 0 | adev->xcp_mgr->adev->virt.init_data_header.offset | 0-u32max |
| HOST_DATA | 0 | adev->xcp_mgr->adev->virt.init_data_header.size_kb | 0-u32max |
| HOST_DATA | 0 | adev->xcp_mgr->num_xcp_per_mem_partition | 0-8[c] |
| HOST_DATA | 0 | adev->xcp_mgr->num_xcps | 1-8[c] |
| HALF_LOCKED2 | &dqm->lock_hidden |
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c detect_queue_hang() -> amdgpu_queue_mask_bit_to_mec_queue()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 1 | bit | 0-127 |
| PARAM_VALUE | 2 | mec | 2559495645910671360 |
| PARAM_VALUE | 2 | *mec | 0 |
| PARAM_VALUE | 3 | pipe | 3303100993684090880 |
| PARAM_VALUE | 4 | queue | 1026472178712211456 |
| FUZZY_MAX | 1 | bit | 127 |
| HARD_MAX | 1 | bit | 127 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | &dqm->lock_hidden | ||
| HALF_LOCKED2 | &dqm->dev->adev->reset_domain->sem | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &target->mutex | ||
| TYPE_LOCK | (struct amdgpu_reset_domain)->sem | ||
| TYPE_LOCK | (struct device_queue_manager)->lock_hidden |