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Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 2 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c amdgpu_ras_eeprom_append() -> amdgpu_ras_debugfs_set_ret_size()

Type Parameter Key Value
PARAM_VALUE 0 control 4096-ptr_max
PARAM_VALUE 0 control->is_eeprom_valid 1
PARAM_VALUE 0 control->ras_max_record_count 1-u32max
PARAM_VALUE 0 control->ras_tbl_mutex.dep_map->name 0-255
PARAM_VALUE 0 control->ras_tbl_mutex.first_waiter 0,4096-ptr_max
PARAM_VALUE 0 control->ras_tbl_mutex.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 control->ras_tbl_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 0 control->ras_tbl_mutex.wait_lock.dep_map->name 0-255
PARAM_VALUE 0 control->ras_tbl_mutex.wait_lock.owner (-1)
PARAM_VALUE 0 control->ras_tbl_mutex.wait_lock.owner_cpu u32max
PARAM_VALUE 0 control->tbl_hdr.checksum 0-255
PARAM_VALUE 0 control->tbl_hdr.header 1111573575
PARAM_VALUE 0 control->tbl_rai.rma_status 2
BUF_SIZE 0 control 480
CAPPED_DATA 0 control->ras_max_record_count 1
CAPPED_DATA 0 &control->ras_tbl_mutex 1
DATA_SOURCE 0 control $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 control->ras_num_pa_recs
NO_OVERFLOW_SIMPLE 0 control->ras_num_recs
LOCK2 0 &control->ras_tbl_mutex
TYPE_LOCK (struct amdgpu_ras_eeprom_control)->ras_tbl_mutex

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c amdgpu_ras_eeprom_reset_table() -> amdgpu_ras_debugfs_set_ret_size()

Type Parameter Key Value
PARAM_VALUE 0 control 4096-ptr_max
PARAM_VALUE 0 control->bad_channel_bitmap 0
PARAM_VALUE 0 control->ras_fri 0
PARAM_VALUE 0 control->ras_max_record_count 10911,10921
PARAM_VALUE 0 control->ras_num_bad_pages 0
PARAM_VALUE 0 control->ras_num_mca_recs 0
PARAM_VALUE 0 control->ras_num_pa_recs 0
PARAM_VALUE 0 control->ras_num_recs 0
PARAM_VALUE 0 control->ras_record_offset 20,276
PARAM_VALUE 0 control->ras_tbl_mutex.dep_map->name 0-255
PARAM_VALUE 0 control->ras_tbl_mutex.first_waiter 0,4096-ptr_max
PARAM_VALUE 0 control->ras_tbl_mutex.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 control->ras_tbl_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 0 control->ras_tbl_mutex.wait_lock.dep_map->name 0-255
PARAM_VALUE 0 control->ras_tbl_mutex.wait_lock.owner (-1)
PARAM_VALUE 0 control->ras_tbl_mutex.wait_lock.owner_cpu u32max
PARAM_VALUE 0 control->tbl_hdr.checksum 0-255
PARAM_VALUE 0 control->tbl_hdr.first_rec_offset 20,276
PARAM_VALUE 0 control->tbl_hdr.header 1095582802
PARAM_VALUE 0 control->tbl_hdr.tbl_size 20,276
BUF_SIZE 0 control (-1),480
BUF_SIZE 0 control (-1),480
CAPPED_DATA 0 &control->ras_tbl_mutex 1
DATA_SOURCE 0 control $0
FUZZY_MAX 0 control->ras_max_record_count 10921
FUZZY_MAX 0 control->ras_record_offset 276
FUZZY_MAX 0 control->tbl_hdr.first_rec_offset 276
FUZZY_MAX 0 control->tbl_hdr.tbl_size 276
BIT_INFO 0 control->ras_max_record_count 0x2a89,0xffffffffffffffff
BIT_INFO 0 control->ras_record_offset 0x14,0xffffffffffffffff
HARD_MAX 0 control->ras_max_record_count 10921
HARD_MAX 0 control->ras_record_offset 276
HARD_MAX 0 control->tbl_hdr.first_rec_offset 276
HARD_MAX 0 control->tbl_hdr.tbl_size 276
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 0 &control->ras_tbl_mutex
TYPE_LOCK (struct amdgpu_ras_eeprom_control)->ras_tbl_mutex

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_debugfs_create_ctrl_node() -> amdgpu_ras_debugfs_set_ret_size()

Type Parameter Key Value
PARAM_VALUE 0 control 4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock