| PARAM_VALUE |
0 |
control |
4096-ptr_max |
| PARAM_VALUE |
0 |
control->ras_tbl_mutex.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
control->ras_tbl_mutex.first_waiter |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
control->ras_tbl_mutex.first_waiter->list.prev->next |
5159360019465732096 |
| PARAM_VALUE |
0 |
control->ras_tbl_mutex.osq.tail.counter |
0-s32max |
| PARAM_VALUE |
0 |
control->ras_tbl_mutex.wait_lock.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
control->ras_tbl_mutex.wait_lock.owner |
(-1) |
| PARAM_VALUE |
0 |
control->ras_tbl_mutex.wait_lock.owner_cpu |
u32max |
| BUF_SIZE |
0 |
control |
480 |
| CAPPED_DATA |
0 |
&control->ras_tbl_mutex |
1 |
| LOCK2 |
0 |
&control->ras_tbl_mutex |
|
| TYPE_LOCK |
|
(struct amdgpu_ras_eeprom_control)->ras_tbl_mutex |
|