Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 1 files:
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uvd_v6_0_enable_mgcg() -> amdgpu_reg_uvd_ctx_rd32()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 1 | reg | 192 |
| DATA_SOURCE | 0 | adev | $0 |
| BIT_INFO | 0 | adev->cg_flags | 0x2000,0xffffffffffffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uvd_v6_0_enable_mgcg() -> amdgpu_reg_uvd_ctx_rd32()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 1 | reg | 192 |
| DATA_SOURCE | 0 | adev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c uvd_v3_1_enable_mgcg() -> amdgpu_reg_uvd_ctx_rd32()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | adev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | *adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 1 | reg | 192 |
| DATA_SOURCE | 0 | adev | $0 |
| BIT_INFO | 0 | adev->cg_flags | 0x2000,0xffffffffffffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c uvd_v3_1_enable_mgcg() -> amdgpu_reg_uvd_ctx_rd32()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | adev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | *adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 1 | reg | 192 |
| DATA_SOURCE | 0 | adev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c uvd_v3_1_start() -> amdgpu_reg_uvd_ctx_rd32()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->gfx.rlc.cs_data->section->reg_index | 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530,41630,41632-41633,41635,41637,41694,41717,62460,65472 |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | adev->mode_info.atom_context->data_block | 0-u16max |
| PARAM_VALUE | 0 | adev->mode_info.atom_context->execute_depth | 0-4294967295 |
| PARAM_VALUE | 0 | adev->mode_info.atom_context->fb_base | 0-4294967295 |
| PARAM_VALUE | 0 | adev->mode_info.atom_context->reg_block | 0-u16max |
| PARAM_VALUE | 0 | adev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 1 | reg | 155 |
| DATA_SOURCE | 0 | adev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &adev->reset_domain->sem | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | global &drm_unplug_srcu |
drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c uvd_v5_0_enable_mgcg() -> amdgpu_reg_uvd_ctx_rd32()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 1 | reg | 192 |
| DATA_SOURCE | 0 | adev | $0 |
| BIT_INFO | 0 | adev->cg_flags | 0x2000,0xffffffffffffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c uvd_v5_0_enable_mgcg() -> amdgpu_reg_uvd_ctx_rd32()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 1 | reg | 192 |
| DATA_SOURCE | 0 | adev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c amdgpu_cgs_read_ind_register() -> amdgpu_reg_uvd_ctx_rd32()
| Type | Parameter | Key | Value |
|---|---|---|---|
| DATA_SOURCE | 1 | reg | $2 |
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c uvd_v4_2_enable_mgcg() -> amdgpu_reg_uvd_ctx_rd32()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 1 | reg | 192 |
| DATA_SOURCE | 0 | adev | $0 |
| BIT_INFO | 0 | adev->cg_flags | 0x2000,0xffffffffffffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c uvd_v4_2_enable_mgcg() -> amdgpu_reg_uvd_ctx_rd32()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 1 | reg | 192 |
| DATA_SOURCE | 0 | adev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c uvd_v4_2_start() -> amdgpu_reg_uvd_ctx_rd32()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | adev | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | adev->mes.saved_flags | 0,2048 |
| PARAM_VALUE | 0 | adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | adev->uvd.fw | 4096-ptr_max |
| PARAM_VALUE | 0 | adev->uvd.fw->data | 4096-ptr_max |
| PARAM_VALUE | 1 | reg | 155 |
| DATA_SOURCE | 0 | adev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &adev->reset_domain->sem | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | global &drm_unplug_srcu |