Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 2 files:
- drivers/gpu/drm/i915/display/intel_dpll.c
- drivers/gpu/drm/i915/display/intel_pch_display.c, line 404
Smatch caller information:
drivers/gpu/drm/i915/display/intel_dpll.c chv_enable_pll() -> assert_pps_unlocked()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->dkl.phy_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->hotplug.poll_init_work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->parent | 4096-ptr_max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.next | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.next->next | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.prev | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.prev->next | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.prev->prev | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | display->power.domains.power_wells->count | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.power_wells->hw_enabled | 1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 0 | *display->power.chv_phy_assert | 0-1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | display->dmc.dmc->dc6_allowed.dc5_start | 0-4294967295 |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
drivers/gpu/drm/i915/display/intel_dpll.c i9xx_enable_pll() -> assert_pps_unlocked()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->dkl.phy_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->hotplug.poll_init_work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->parent | 4096-ptr_max |
| PARAM_VALUE | 0 | display->platform.i830 | 0 |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.next | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.next->next | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.prev | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.prev->next | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.prev->prev | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | display->power.domains.power_wells->count | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.power_wells->hw_enabled | 1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 0 | *display->power.chv_phy_assert | 0-1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | display->dmc.dmc->dc6_allowed.dc5_start | 0-4294967295 |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_dpll.c vlv_enable_pll() -> assert_pps_unlocked()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->dkl.phy_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->hotplug.poll_init_work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->parent | 4096-ptr_max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.next | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.next->next | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.prev | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.prev->next | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.prev->prev | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | display->power.domains.power_wells->count | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.power_wells->hw_enabled | 1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 0 | *display->power.chv_phy_assert | 0-1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | display->dmc.dmc->dc6_allowed.dc5_start | 0-4294967295 |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
drivers/gpu/drm/i915/display/intel_pch_display.c ilk_pch_enable() -> assert_pps_unlocked()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |