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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_cdclk.c _bxt_set_cdclk() -> cdclk_squash_waveform()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->cdclk.funcs 4096-ptr_max
PARAM_VALUE 0 display->cdclk.funcs->set_cdclk 0,981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232
PARAM_VALUE 0 display->drm 0,4096-ptr_max
PARAM_VALUE 0 display->info.__device_info 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 0 display->wl.work.work.entry.next->next 1-u64max
PARAM_VALUE 0 display->wl.work.work.entry.prev->next 1-u64max
PARAM_VALUE 0 display->wl.work.work.entry.prev->prev 1-u64max
PARAM_VALUE 0 *display->irq.pipestat_irq_mask 0-4294967295
DATA_SOURCE 0 display $0
STR_LEN 0 display (-1),21-22
STR_LEN 0 display (-1),21-22
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 display->cdclk.hw.joined_mbus 0-1
HOST_DATA 0 display->drm->mode_config.object_idr.idr_rt.xa_flags 0,4-u32max
HOST_DATA 0 display->power.chv_phy_control 0-u32max[c]
HOST_DATA 0 display->power.domains.dc_state 0-1073741835
HOST_DATA 0 display->state.bxt_phy_grc 0-u32max
NO_OVERFLOW_SIMPLE 0 display->drm->num_crtcs
HALF_LOCKED2 0 &display->gmbus.mutex

drivers/gpu/drm/i915/display/intel_cdclk.c bxt_cdclk_ctl() -> cdclk_squash_waveform()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->cdclk.funcs 4096-ptr_max
PARAM_VALUE 0 display->cdclk.funcs->set_cdclk 0,981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232
PARAM_VALUE 0 display->drm 0,4096-ptr_max
PARAM_VALUE 0 display->drm->huge_mnt->mnt_sb->s_cop->inode_info_offs 1632,1720,1808,2632,2648
PARAM_VALUE 0 display->opregion->vbt 0-s64max
PARAM_VALUE 0 *display->irq.pipestat_irq_mask 0-4294967295
DATA_SOURCE 0 display $0
STR_LEN 0 display (-1),21-22
STR_LEN 0 display (-1),21-22
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 display->cdclk.hw.joined_mbus 0-1
HOST_DATA 0 display->drm->mode_config.object_idr.idr_rt.xa_flags 0,4-u32max
HOST_DATA 0 display->power.chv_phy_control 0-u32max[c]
HOST_DATA 0 display->power.domains.dc_state 0-1073741835
HOST_DATA 0 display->state.bxt_phy_grc 0-u32max
NO_OVERFLOW_SIMPLE 0 display->drm->num_crtcs
HALF_LOCKED2 0 &display->gmbus.mutex

drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_compute_crawl_and_squash_midpoint() -> cdclk_squash_waveform()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->cdclk.funcs 4096-ptr_max
PARAM_VALUE 0 display->cdclk.funcs->set_cdclk 0,981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232
PARAM_VALUE 0 display->drm 0,4096-ptr_max
PARAM_VALUE 0 display->info.__device_info 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 0 display->wl.work.work.entry.next->next 1-u64max
PARAM_VALUE 0 display->wl.work.work.entry.prev->next 1-u64max
PARAM_VALUE 0 display->wl.work.work.entry.prev->prev 1-u64max
PARAM_VALUE 0 *display->irq.pipestat_irq_mask 0-4294967295
DATA_SOURCE 0 display $0
STR_LEN 0 display (-1),21-22
STR_LEN 0 display (-1),21-22
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 display->cdclk.hw.joined_mbus 0-1
HOST_DATA 0 display->drm->mode_config.object_idr.idr_rt.xa_flags 0,4-u32max
HOST_DATA 0 display->power.chv_phy_control 0-u32max[c]
HOST_DATA 0 display->power.domains.dc_state 0-1073741835
HOST_DATA 0 display->state.bxt_phy_grc 0-u32max
NO_OVERFLOW_SIMPLE 0 display->drm->num_crtcs
HALF_LOCKED2 0 &display->gmbus.mutex

drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_compute_crawl_and_squash_midpoint() -> cdclk_squash_waveform()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->cdclk.funcs 4096-ptr_max
PARAM_VALUE 0 display->cdclk.funcs->set_cdclk 0,981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232
PARAM_VALUE 0 display->drm 0,4096-ptr_max
PARAM_VALUE 0 display->info.__device_info 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 0 display->wl.work.work.entry.next->next 1-u64max
PARAM_VALUE 0 display->wl.work.work.entry.prev->next 1-u64max
PARAM_VALUE 0 display->wl.work.work.entry.prev->prev 1-u64max
PARAM_VALUE 0 *display->irq.pipestat_irq_mask 0-4294967295
DATA_SOURCE 0 display $0
STR_LEN 0 display (-1),21-22
STR_LEN 0 display (-1),21-22
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 display->cdclk.hw.joined_mbus 0-1
HOST_DATA 0 display->drm->mode_config.object_idr.idr_rt.xa_flags 0,4-u32max
HOST_DATA 0 display->power.chv_phy_control 0-u32max[c]
HOST_DATA 0 display->power.domains.dc_state 0-1073741835
HOST_DATA 0 display->state.bxt_phy_grc 0-u32max
NO_OVERFLOW_SIMPLE 0 display->drm->num_crtcs
HALF_LOCKED2 0 &display->gmbus.mutex

drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_compute_crawl_and_squash_midpoint() -> cdclk_squash_waveform()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->cdclk.funcs 4096-ptr_max
PARAM_VALUE 0 display->cdclk.funcs->set_cdclk 0,981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232
PARAM_VALUE 0 display->drm 0,4096-ptr_max
PARAM_VALUE 0 display->info.__device_info 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 0 display->wl.work.work.entry.next->next 1-u64max
PARAM_VALUE 0 display->wl.work.work.entry.prev->next 1-u64max
PARAM_VALUE 0 display->wl.work.work.entry.prev->prev 1-u64max
PARAM_VALUE 0 *display->irq.pipestat_irq_mask 0-4294967295
DATA_SOURCE 0 display $0
STR_LEN 0 display (-1),21-22
STR_LEN 0 display (-1),21-22
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 display->cdclk.hw.joined_mbus 0-1
HOST_DATA 0 display->drm->mode_config.object_idr.idr_rt.xa_flags 0,4-u32max
HOST_DATA 0 display->power.chv_phy_control 0-u32max[c]
HOST_DATA 0 display->power.domains.dc_state 0-1073741835
HOST_DATA 0 display->state.bxt_phy_grc 0-u32max
NO_OVERFLOW_SIMPLE 0 display->drm->num_crtcs
HALF_LOCKED2 0 &display->gmbus.mutex

drivers/gpu/drm/i915/display/intel_cdclk.c intel_cdclk_can_crawl_and_squash() -> cdclk_squash_waveform()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->info.__device_info 4096-ptr_max
DATA_SOURCE 0 display $0
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_cdclk.c intel_cdclk_can_crawl_and_squash() -> cdclk_squash_waveform()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->info.__device_info 4096-ptr_max
DATA_SOURCE 0 display $0
RX_PATH
TASK_NOT_RUNNING