Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_display_power.c __intel_display_power_init_hw() -> chv_phy_control_init()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent->vlv_iosf 0,197119610173992960
PARAM_VALUE 0 display->platform.broxton 0
PARAM_VALUE 0 display->platform.cherryview 1
PARAM_VALUE 0 display->platform.geminilake 0
PARAM_VALUE 0 display->power.domains.initializing 1
PARAM_VALUE 0 display->power.domains.lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 display->power.domains.lock.osq.tail.counter 0-s32max
PARAM_VALUE 0 display->power.domains.lock.wait_lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.wait_lock.owner (-1)
PARAM_VALUE 0 display->power.domains.lock.wait_lock.owner_cpu u32max
PARAM_VALUE 0 display->restore.reset_ctx.ww_ctx.ww_class->is_wait_die 0-1
PARAM_VALUE 0 *display->bw.peakbw 0-4294967295
PARAM_VALUE 0 *display->bw.psf_bw 0-4294967295
BUF_SIZE 0 display (-1),8416
BUF_SIZE 0 display (-1),8416
DATA_SOURCE 0 display $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 display->cdclk.hw.joined_mbus 0-1
HOST_DATA 0 display->power.domains.dc_state 0-u32max
NO_OVERFLOW_SIMPLE 0 display->drm->num_crtcs
LOCK2 &power_domains->lock
TYPE_LOCK (struct i915_power_domains)->lock