Defined in 1 files as a prototype:
Defined in 2 files as a function:
- drivers/gpu/drm/amd/amdgpu/cik.c, line 1494 (as a function)
- drivers/gpu/drm/radeon/cik.c, line 9465 (as a function)
Referenced in 2 files:
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_vce_idle_work_handler() -> (struct amdgpu_asic_funcs)->set_vce_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 0 |
| PARAM_VALUE | 1 | evclk | 0 |
| PARAM_VALUE | 2 | ecclk | 0 |
| CAPPED_DATA | 0 | rdev->vce.num_rings | 1 |
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_vce_ring_begin_use() -> (struct amdgpu_asic_funcs)->set_vce_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 0 |
| PARAM_VALUE | 0 | rdev->vce.idle_mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->vce.idle_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->vce.idle_mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->vce.idle_mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 1 | evclk | 53300 |
| PARAM_VALUE | 2 | ecclk | 40000 |
| CAPPED_DATA | 0 | &rdev->vce.idle_mutex | 1 |
| BIT_INFO | 0 | rdev->virt.caps | 0x0,0xfffffffb |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | &adev->vce.idle_mutex | ||
| HALF_LOCKED2 | &adev->gfx.gpu_clock_mutex | ||
| HALF_LOCKED2 | &adev->reset_domain->sem | ||
| HALF_LOCKED2 | &adev->srbm_mutex | ||
| HALF_LOCKED2 | &kiq->ring_lock | ||
| HALF_LOCKED2 | &mux->lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | flags | ||
| HALF_LOCKED2 | global &drm_unplug_srcu | ||
| HALF_LOCKED2 | ring_lock | ||
| TYPE_LOCK | (struct amdgpu_vce)->idle_mutex |
drivers/gpu/drm/amd/amdgpu/vce_v1_0.c vce_v1_0_hw_init() -> (struct amdgpu_asic_funcs)->set_vce_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 0 |
| PARAM_VALUE | 1 | evclk | 10000 |
| PARAM_VALUE | 2 | ecclk | 10000 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/vce_v1_0.c vce_v1_0_suspend() -> (struct amdgpu_asic_funcs)->set_vce_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 0 |
| PARAM_VALUE | 1 | evclk | 0 |
| PARAM_VALUE | 2 | ecclk | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &adev->reset_domain->sem | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | global &drm_unplug_srcu |
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c vce_v3_0_hw_init() -> (struct amdgpu_asic_funcs)->set_vce_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | evclk | 10000 |
| PARAM_VALUE | 2 | ecclk | 10000 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c vce_v3_0_suspend() -> (struct amdgpu_asic_funcs)->set_vce_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 0 |
| PARAM_VALUE | 1 | evclk | 0 |
| PARAM_VALUE | 2 | ecclk | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &adev->reset_domain->sem | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | global &drm_unplug_srcu |
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c vce_v4_0_suspend() -> (struct amdgpu_asic_funcs)->set_vce_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 0 |
| PARAM_VALUE | 0 | rdev->vce.vcpu_bo | 1-u64max |
| PARAM_VALUE | 1 | evclk | 0 |
| PARAM_VALUE | 2 | ecclk | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &adev->reset_domain->sem | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | global &drm_unplug_srcu |
drivers/gpu/drm/amd/amdgpu/vce_v2_0.c vce_v2_0_hw_init() -> (struct amdgpu_asic_funcs)->set_vce_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | evclk | 10000 |
| PARAM_VALUE | 2 | ecclk | 10000 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/vce_v2_0.c vce_v2_0_suspend() -> (struct amdgpu_asic_funcs)->set_vce_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 0 |
| PARAM_VALUE | 1 | evclk | 0 |
| PARAM_VALUE | 2 | ecclk | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &adev->reset_domain->sem | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | global &drm_unplug_srcu |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_set_vce_clock() -> (struct amdgpu_asic_funcs)->set_vce_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| BUF_SIZE | 0 | rdev | 1256,3984 |
| BUF_SIZE | 0 | rdev | 1256,3984 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | &adev->pm.mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_set_vce_clock() -> (struct amdgpu_asic_funcs)->set_vce_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 1 | evclk | 0 |
| PARAM_VALUE | 2 | ecclk | 0 |
| BUF_SIZE | 0 | rdev | 1256,3984 |
| BUF_SIZE | 0 | rdev | 1256,3984 |
| CAPPED_DATA | 0 | rdev->num_ip_blocks | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | &adev->pm.mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_set_vce_clock() -> (struct radeon_asic)->pm.set_vce_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 1-u64max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->ring_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ring_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner_cpu | u32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mclk_lock | ||
| LOCK2 | &rdev->pm.mutex | ||
| LOCK2 | &rdev->ring_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_device)->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mclk_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/trinity_dpm.c trinity_set_vce_clock() -> (struct radeon_asic)->pm.set_vce_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 1-u64max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->ring_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ring_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner_cpu | u32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mclk_lock | ||
| LOCK2 | &rdev->pm.mutex | ||
| LOCK2 | &rdev->ring_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_device)->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mclk_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/radeon_vce.c radeon_vce_idle_work_handler() -> (struct radeon_asic)->pm.set_vce_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 1 | evclk | 0 |
| PARAM_VALUE | 2 | ecclk | 0 |
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/radeon/radeon_vce.c radeon_vce_note_usage() -> (struct radeon_asic)->pm.set_vce_clocks()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 1 | evclk | 53300 |
| PARAM_VALUE | 2 | ecclk | 40000 |
| BUF_SIZE | 0 | rdev | s32min-(-2),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-2),1-s32max |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &rdev->exclusive_lock |