Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 3 files:
- drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c
- drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
- drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.c
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/../display/dc/dpp/dcn20/dcn20_dpp_cm.c dpp20_program_blnd_luta_settings() -> cm_helper_program_xfer_func()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| PARAM_VALUE | 2 | reg | 3943746829387919360 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_lut_offset | 511 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_num_segments | 28672 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_lut_offset | 33488896 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_num_segments | 1879048192 |
| PARAM_VALUE | 2 | reg->masks.exp_region_start | 262143 |
| PARAM_VALUE | 2 | reg->masks.exp_resion_start_segment | 133169152 |
| PARAM_VALUE | 2 | reg->masks.field_region_end | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_end_base | 4294901760 |
| PARAM_VALUE | 2 | reg->masks.field_region_end_slope | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_linear_slope | 262143 |
| PARAM_VALUE | 2 | reg->region_end | 16963,17326,17689,18052,27470,27833 |
| PARAM_VALUE | 2 | reg->region_start | 16947,17310,17673,18036,27454,27817 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_lut_offset | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_num_segments | 12 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_lut_offset | 16 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_num_segments | 28 |
| PARAM_VALUE | 2 | reg->shifts.exp_region_start | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_resion_start_segment | 20 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_base | 16 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_slope | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_linear_slope | 0 |
| PARAM_VALUE | 2 | reg->start_cntl_b | 16935,17298,17661,18024,27442,27805 |
| PARAM_VALUE | 2 | reg->start_cntl_g | 16936,17299,17662,18025,27443,27806 |
| PARAM_VALUE | 2 | reg->start_cntl_r | 16937,17300,17663,18026,27444,27807 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_b | 16941,17304,17667,18030,27448,27811 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_g | 16943,17306,17669,18032,27450,27813 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_r | 16945,17308,17671,18034,27452,27815 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_b | 16942,17305,17668,18031,27449,27812 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_g | 16944,17307,17670,18033,27451,27814 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_r | 16946,17309,17672,18035,27453,27816 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_b | 16938,17301,17664,18027,27445,27808 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_g | 16939,17302,17665,18028,27446,27809 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_r | 16940,17303,17666,18029,27447,27810 |
| BUF_SIZE | 1 | params | 0,19216 |
| BUF_SIZE | 1 | params | 0,19216 |
| DATA_SOURCE | 1 | params | $1 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/dpp/dcn20/dcn20_dpp_cm.c dpp20_program_blnd_lutb_settings() -> cm_helper_program_xfer_func()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| PARAM_VALUE | 2 | reg | 914004391154941952 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_lut_offset | 511 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_num_segments | 28672 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_lut_offset | 33488896 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_num_segments | 1879048192 |
| PARAM_VALUE | 2 | reg->masks.exp_region_start | 262143 |
| PARAM_VALUE | 2 | reg->masks.exp_resion_start_segment | 133169152 |
| PARAM_VALUE | 2 | reg->masks.field_region_end | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_end_base | 4294901760 |
| PARAM_VALUE | 2 | reg->masks.field_region_end_slope | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_linear_slope | 262143 |
| PARAM_VALUE | 2 | reg->region_end | 16992,17355,17718,18081,27499,27862 |
| PARAM_VALUE | 2 | reg->region_start | 16976,17339,17702,18065,27483,27846 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_lut_offset | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_num_segments | 12 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_lut_offset | 16 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_num_segments | 28 |
| PARAM_VALUE | 2 | reg->shifts.exp_region_start | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_resion_start_segment | 20 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_base | 16 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_slope | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_linear_slope | 0 |
| PARAM_VALUE | 2 | reg->start_cntl_b | 16964,17327,17690,18053,27471,27834 |
| PARAM_VALUE | 2 | reg->start_cntl_g | 16965,17328,17691,18054,27472,27835 |
| PARAM_VALUE | 2 | reg->start_cntl_r | 16966,17329,17692,18055,27473,27836 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_b | 16970,17333,17696,18059,27477,27840 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_g | 16972,17335,17698,18061,27479,27842 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_r | 16974,17337,17700,18063,27481,27844 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_b | 16971,17334,17697,18060,27478,27841 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_g | 16973,17336,17699,18062,27480,27843 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_r | 16975,17338,17701,18064,27482,27845 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_b | 16967,17330,17693,18056,27474,27837 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_g | 16968,17331,17694,18057,27475,27838 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_r | 16969,17332,17695,18058,27476,27839 |
| BUF_SIZE | 1 | params | 0,19216 |
| BUF_SIZE | 1 | params | 0,19216 |
| DATA_SOURCE | 1 | params | $1 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/dpp/dcn10/dcn10_dpp_cm.c dpp1_cm_program_regamma_luta_settings() -> cm_helper_program_xfer_func()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| PARAM_VALUE | 1 | params->hw_points_num | 0 |
| PARAM_VALUE | 2 | reg | 4641122943023091712 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_lut_offset | 511 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_num_segments | 28672 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_lut_offset | 33488896 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_num_segments | 1879048192 |
| PARAM_VALUE | 2 | reg->masks.exp_region_start | 262143 |
| PARAM_VALUE | 2 | reg->masks.exp_resion_start_segment | 133169152 |
| PARAM_VALUE | 2 | reg->masks.field_region_end | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_end_base | 4294901760 |
| PARAM_VALUE | 2 | reg->masks.field_region_end_slope | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_linear_slope | 262143 |
| PARAM_VALUE | 2 | reg->region_end | 16845,17128,17411,17694 |
| PARAM_VALUE | 2 | reg->region_start | 16829,17112,17395,17678 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_lut_offset | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_num_segments | 12 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_lut_offset | 16 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_num_segments | 28 |
| PARAM_VALUE | 2 | reg->shifts.exp_region_start | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_resion_start_segment | 20 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_base | 16 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_slope | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_linear_slope | 0 |
| PARAM_VALUE | 2 | reg->start_cntl_b | 16817,17100,17383,17666 |
| PARAM_VALUE | 2 | reg->start_cntl_g | 16818,17101,17384,17667 |
| PARAM_VALUE | 2 | reg->start_cntl_r | 16819,17102,17385,17668 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_b | 16823,17106,17389,17672 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_g | 16825,17108,17391,17674 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_r | 16827,17110,17393,17676 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_b | 16824,17107,17390,17673 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_g | 16826,17109,17392,17675 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_r | 16828,17111,17394,17677 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_b | 16820,17103,17386,17669 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_g | 16821,17104,17387,17670 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_r | 16822,17105,17388,17671 |
| DATA_SOURCE | 1 | params | $1 |
| MEM_ZERO | 1 | params | |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/dpp/dcn10/dcn10_dpp_cm.c dpp1_cm_program_regamma_lutb_settings() -> cm_helper_program_xfer_func()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| PARAM_VALUE | 1 | params->hw_points_num | 0 |
| PARAM_VALUE | 2 | reg | 8172384105774243840 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_lut_offset | 511 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_num_segments | 28672 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_lut_offset | 33488896 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_num_segments | 1879048192 |
| PARAM_VALUE | 2 | reg->masks.exp_region_start | 262143 |
| PARAM_VALUE | 2 | reg->masks.exp_resion_start_segment | 133169152 |
| PARAM_VALUE | 2 | reg->masks.field_region_end | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_end_base | 4294901760 |
| PARAM_VALUE | 2 | reg->masks.field_region_end_slope | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_linear_slope | 262143 |
| PARAM_VALUE | 2 | reg->region_end | 16874,17157,17440,17723 |
| PARAM_VALUE | 2 | reg->region_start | 16858,17141,17424,17707 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_lut_offset | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_num_segments | 12 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_lut_offset | 16 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_num_segments | 28 |
| PARAM_VALUE | 2 | reg->shifts.exp_region_start | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_resion_start_segment | 20 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_base | 16 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_slope | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_linear_slope | 0 |
| PARAM_VALUE | 2 | reg->start_cntl_b | 16846,17129,17412,17695 |
| PARAM_VALUE | 2 | reg->start_cntl_g | 16847,17130,17413,17696 |
| PARAM_VALUE | 2 | reg->start_cntl_r | 16848,17131,17414,17697 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_b | 16852,17135,17418,17701 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_g | 16854,17137,17420,17703 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_r | 16856,17139,17422,17705 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_b | 16853,17136,17419,17702 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_g | 16855,17138,17421,17704 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_r | 16857,17140,17423,17706 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_b | 16849,17132,17415,17698 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_g | 16850,17133,17416,17699 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_r | 16851,17134,17417,17700 |
| DATA_SOURCE | 1 | params | $1 |
| MEM_ZERO | 1 | params | |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/dpp/dcn10/dcn10_dpp_cm.c dpp1_program_degamma_luta_settings() -> cm_helper_program_xfer_func()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| PARAM_VALUE | 2 | reg | 8513024884836536320 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_lut_offset | 511 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_num_segments | 28672 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_lut_offset | 33488896 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_num_segments | 1879048192 |
| PARAM_VALUE | 2 | reg->masks.exp_region_start | 262143 |
| PARAM_VALUE | 2 | reg->masks.exp_resion_start_segment | 133169152 |
| PARAM_VALUE | 2 | reg->masks.field_region_end | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_end_base | 4294901760 |
| PARAM_VALUE | 2 | reg->masks.field_region_end_slope | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_linear_slope | 262143 |
| PARAM_VALUE | 2 | reg->region_end | 16792,17075,17358,17641 |
| PARAM_VALUE | 2 | reg->region_start | 16785,17068,17351,17634 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_lut_offset | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_num_segments | 12 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_lut_offset | 16 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_num_segments | 28 |
| PARAM_VALUE | 2 | reg->shifts.exp_region_start | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_resion_start_segment | 20 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_base | 16 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_slope | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_linear_slope | 0 |
| PARAM_VALUE | 2 | reg->start_cntl_b | 16773,17056,17339,17622 |
| PARAM_VALUE | 2 | reg->start_cntl_g | 16774,17057,17340,17623 |
| PARAM_VALUE | 2 | reg->start_cntl_r | 16775,17058,17341,17624 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_b | 16779,17062,17345,17628 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_g | 16781,17064,17347,17630 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_r | 16783,17066,17349,17632 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_b | 16780,17063,17346,17629 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_g | 16782,17065,17348,17631 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_r | 16784,17067,17350,17633 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_b | 16776,17059,17342,17625 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_g | 16777,17060,17343,17626 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_r | 16778,17061,17344,17627 |
| DATA_SOURCE | 1 | params | $1 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/dpp/dcn10/dcn10_dpp_cm.c dpp1_program_degamma_lutb_settings() -> cm_helper_program_xfer_func()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| PARAM_VALUE | 2 | reg | 2318977824990822400 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_lut_offset | 511 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_num_segments | 28672 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_lut_offset | 33488896 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_num_segments | 1879048192 |
| PARAM_VALUE | 2 | reg->masks.exp_region_start | 262143 |
| PARAM_VALUE | 2 | reg->masks.exp_resion_start_segment | 133169152 |
| PARAM_VALUE | 2 | reg->masks.field_region_end | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_end_base | 4294901760 |
| PARAM_VALUE | 2 | reg->masks.field_region_end_slope | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_linear_slope | 262143 |
| PARAM_VALUE | 2 | reg->region_end | 16812,17095,17378,17661 |
| PARAM_VALUE | 2 | reg->region_start | 16805,17088,17371,17654 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_lut_offset | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_num_segments | 12 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_lut_offset | 16 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_num_segments | 28 |
| PARAM_VALUE | 2 | reg->shifts.exp_region_start | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_resion_start_segment | 20 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_base | 16 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_slope | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_linear_slope | 0 |
| PARAM_VALUE | 2 | reg->start_cntl_b | 16793,17076,17359,17642 |
| PARAM_VALUE | 2 | reg->start_cntl_g | 16794,17077,17360,17643 |
| PARAM_VALUE | 2 | reg->start_cntl_r | 16795,17078,17361,17644 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_b | 16799,17082,17365,17648 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_g | 16801,17084,17367,17650 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_r | 16803,17086,17369,17652 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_b | 16800,17083,17366,17649 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_g | 16802,17085,17368,17651 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_r | 16804,17087,17370,17653 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_b | 16796,17079,17362,17645 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_g | 16797,17080,17363,17646 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_r | 16798,17081,17364,17647 |
| DATA_SOURCE | 1 | params | $1 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/mpc/dcn20/dcn20_mpc.c mpc2_program_luta() -> cm_helper_program_xfer_func()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| PARAM_VALUE | 2 | reg | 6539443210359414784 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_lut_offset | 511 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_num_segments | 28672 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_lut_offset | 33488896 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_num_segments | 1879048192 |
| PARAM_VALUE | 2 | reg->masks.exp_region_start | 262143 |
| PARAM_VALUE | 2 | reg->masks.exp_resion_start_segment | 133169152 |
| PARAM_VALUE | 2 | reg->masks.field_region_end | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_end_base | 4294901760 |
| PARAM_VALUE | 2 | reg->masks.field_region_end_slope | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_linear_slope | 262143 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_lut_offset | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_num_segments | 12 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_lut_offset | 16 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_num_segments | 28 |
| PARAM_VALUE | 2 | reg->shifts.exp_region_start | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_resion_start_segment | 20 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_base | 16 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_slope | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_linear_slope | 0 |
| BUF_SIZE | 1 | params | 0,19216 |
| BUF_SIZE | 1 | params | 0,19216 |
| DATA_SOURCE | 1 | params | $2 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/mpc/dcn20/dcn20_mpc.c mpc2_program_lutb() -> cm_helper_program_xfer_func()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| PARAM_VALUE | 2 | reg | 1143631351378726912 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_lut_offset | 511 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_num_segments | 28672 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_lut_offset | 33488896 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_num_segments | 1879048192 |
| PARAM_VALUE | 2 | reg->masks.exp_region_start | 262143 |
| PARAM_VALUE | 2 | reg->masks.exp_resion_start_segment | 133169152 |
| PARAM_VALUE | 2 | reg->masks.field_region_end | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_end_base | 4294901760 |
| PARAM_VALUE | 2 | reg->masks.field_region_end_slope | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_linear_slope | 262143 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_lut_offset | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_num_segments | 12 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_lut_offset | 16 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_num_segments | 28 |
| PARAM_VALUE | 2 | reg->shifts.exp_region_start | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_resion_start_segment | 20 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_base | 16 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_slope | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_linear_slope | 0 |
| BUF_SIZE | 1 | params | 0,19216 |
| BUF_SIZE | 1 | params | 0,19216 |
| DATA_SOURCE | 1 | params | $2 |
| NOCHECK_CALL |