Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 3 files:
- drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c, line 2340
- drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c, line 233
- drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c, line 221
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c dcn35_set_drr() -> (struct timing_generator_funcs)->set_static_screen_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | tg | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs->set_static_screen_control | 5071642371786563584,5913575906034724864,8835630547784204288 |
| PARAM_VALUE | 1 | event_triggers | 2 |
| PARAM_VALUE | 2 | num_frames | 0-118 |
| FUZZY_MAX | 2 | num_frames | 2 |
| CONTAINER | 0 | -320-0+0 | $(-1) |
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &adev->dm.dc_lock | ||
| HALF_LOCKED2 | flags |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c dcn35_set_static_screen_control() -> (struct timing_generator_funcs)->set_static_screen_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | tg | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | event_triggers | 0-1,8-9,512-513,520-521 |
| FUZZY_MAX | 1 | event_triggers | 0 |
| BIT_INFO | 1 | event_triggers | 0x0,0x209 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn10/dcn10_hwseq.c dcn10_set_drr() -> (struct timing_generator_funcs)->set_static_screen_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | tg | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs->set_static_screen_control | 5071642371786563584,5913575906034724864,8835630547784204288 |
| PARAM_VALUE | 1 | event_triggers | 2048 |
| PARAM_VALUE | 2 | num_frames | 2 |
| CONTAINER | 0 | -320-0+0 | $(-1) |
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &adev->dm.dc_lock | ||
| HALF_LOCKED2 | flags |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn10/dcn10_hwseq.c dcn10_set_static_screen_control() -> (struct timing_generator_funcs)->set_static_screen_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | tg | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | event_triggers | 0-3,128-131 |
| FUZZY_MAX | 1 | event_triggers | 0 |
| BIT_INFO | 1 | event_triggers | 0x0,0x83 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn20/dcn20_hwseq.c dcn20_enable_stream_timing() -> (struct timing_generator_funcs)->set_static_screen_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | tg | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs->set_h_timing_div_manual_mode | 0,3943045918683873280,4412274745866633216,7210936702807244800 |
| PARAM_VALUE | 0 | tg->funcs->set_static_screen_control | 5071642371786563584,5913575906034724864,8835630547784204288 |
| PARAM_VALUE | 1 | event_triggers | 0,128 |
| PARAM_VALUE | 2 | num_frames | 2 |
| FUZZY_MAX | 1 | event_triggers | 128 |
| CONTAINER | 0 | *(-320-0+0) | $(-1) |
| BIT_INFO | 1 | event_triggers | 0x0,0x80 |
| HARD_MAX | 1 | event_triggers | 128 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn60/dcn60_hwseq.c dcn60_apply_single_controller_ctx_to_hw() -> (struct timing_generator_funcs)->set_static_screen_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | tg | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs->set_static_screen_control | 5071642371786563584,5913575906034724864,8835630547784204288 |
| PARAM_VALUE | 1 | event_triggers | 0,128 |
| PARAM_VALUE | 2 | num_frames | 2 |
| FUZZY_MAX | 1 | event_triggers | 128 |
| CONTAINER | 0 | *(-320-0+0) | $(-1) |
| BIT_INFO | 1 | event_triggers | 0x0,0x80 |
| HARD_MAX | 1 | event_triggers | 128 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dce110/dce110_hwseq.c dce110_apply_single_controller_ctx_to_hw() -> (struct timing_generator_funcs)->set_static_screen_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | tg | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs->set_static_screen_control | 5071642371786563584,5913575906034724864,8835630547784204288 |
| PARAM_VALUE | 1 | event_triggers | 0,128 |
| PARAM_VALUE | 2 | num_frames | 2 |
| FUZZY_MAX | 1 | event_triggers | 128 |
| CONTAINER | 0 | *(-320-0+0) | $(-1) |
| BIT_INFO | 1 | event_triggers | 0x0,0x80 |
| HARD_MAX | 1 | event_triggers | 128 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dce110/dce110_hwseq.c set_drr() -> (struct timing_generator_funcs)->set_static_screen_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | tg | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs->set_static_screen_control | 5071642371786563584,5913575906034724864,8835630547784204288 |
| PARAM_VALUE | 1 | event_triggers | 128 |
| PARAM_VALUE | 2 | num_frames | 2 |
| CONTAINER | 0 | -320-0+0 | $(-1) |
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &adev->dm.dc_lock | ||
| HALF_LOCKED2 | flags |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dce110/dce110_hwseq.c set_static_screen_control() -> (struct timing_generator_funcs)->set_static_screen_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | tg | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | event_triggers | 0-3,128-135,256-263,384-391,516-519 |
| FUZZY_MAX | 1 | event_triggers | 0 |
| BIT_INFO | 1 | event_triggers | 0x0,0x187 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn31/dcn31_hwseq.c dcn31_set_static_screen_control() -> (struct timing_generator_funcs)->set_static_screen_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | tg | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | event_triggers | 0-1,8-9,256-257,264-265 |
| FUZZY_MAX | 1 | event_triggers | 0 |
| BIT_INFO | 1 | event_triggers | 0x0,0x109 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c dcn401_enable_stream_timing() -> (struct timing_generator_funcs)->set_static_screen_control()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | tg | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | tg->funcs->set_h_timing_div_manual_mode | 0,3943045918683873280,4412274745866633216,7210936702807244800 |
| PARAM_VALUE | 0 | tg->funcs->set_static_screen_control | 5071642371786563584,5913575906034724864,8835630547784204288 |
| PARAM_VALUE | 1 | event_triggers | 0,128 |
| PARAM_VALUE | 2 | num_frames | 2 |
| CONTAINER | 0 | *(-320-0+0) | $(-1) |
| NOCHECK_CALL |