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Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 10 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn50/dcn50_hwseq.c dcn50_update_dchubp_dpp() -> (struct hwseq_private_funcs)->update_mpcc()

Type Parameter Key Value
PARAM_VALUE 0 dc 4096-ptr_max
PARAM_VALUE 0 dc->hwseq 4096-ptr_max
PARAM_VALUE 0 dc->res_pool 4096-ptr_max
PARAM_VALUE 1 pipe_ctx 4096-ptr_max
PARAM_VALUE 1 pipe_ctx->plane_res.dpp->funcs->dpp_program_bias_and_scale 0,6122946766709121024,7192253720081100800
PARAM_VALUE 1 pipe_ctx->plane_res.dpp->funcs->set_cursor_matrix 0,7644130172995436544
PARAM_VALUE 1 pipe_ctx->plane_res.hubp->funcs->hubp_setup2 0,6740729399839121408,8177433257986404352
PARAM_VALUE 1 pipe_ctx->plane_res.hubp->funcs->hubp_setup_interdependent2 0,2577008409401933824,3121652994195677184
PARAM_VALUE 1 pipe_ctx->plane_res.hubp->funcs->set_unbounded_requesting 0,2698511524736036864,6615242434753519616
PARAM_VALUE 1 pipe_ctx->plane_state 4096-ptr_max
DATA_SOURCE 0 dc $0
DATA_SOURCE 1 pipe_ctx $1
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn10/dcn10_hwseq.c dcn10_update_dchubp_dpp() -> (struct hwseq_private_funcs)->update_mpcc()

Type Parameter Key Value
PARAM_VALUE 0 dc 4096-ptr_max
PARAM_VALUE 0 dc->ctx 4096-ptr_max
PARAM_VALUE 0 dc->current_state 4096-ptr_max
PARAM_VALUE 0 dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma -1.797693e+308-1.797693e+308
PARAM_VALUE 0 dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma -1.797693e+308-1.797693e+308
PARAM_VALUE 0 dc->current_state->res_ctx.pipe_ctx 4096-ptr_max
PARAM_VALUE 0 dc->hwseq 4096-ptr_max
PARAM_VALUE 0 dc->hwss.program_front_end_for_ctx 1-u64max
PARAM_VALUE 0 dc->res_pool 4096-ptr_max
PARAM_VALUE 0 dc->res_pool->funcs 4096-ptr_max
PARAM_VALUE 0 dc->res_pool->funcs->prepare_mcache_programming 0,804463396097511424,929829862513430528,8759039014133256192
PARAM_VALUE 0 dc->res_pool->hubbub->funcs 4096-ptr_max
PARAM_VALUE 0 dc->res_pool->hubbub->funcs->force_pstate_change_control 0,2796816337411768320
PARAM_VALUE 0 dc->res_pool->hubbub->funcs->program_det_segments 0,440092313918779392
PARAM_VALUE 0 dc->res_pool->hubbub->funcs->program_det_size 0,3324494803509547008,8166695353123938304
PARAM_VALUE 0 dc->res_pool->pipe_count 1-u32max
PARAM_VALUE 1 pipe_ctx 4096-ptr_max
PARAM_VALUE 1 pipe_ctx->plane_res.dpp->funcs->dpp_setup 4096-ptr_max
PARAM_VALUE 1 pipe_ctx->plane_res.hubp->funcs->hubp_clk_cntl 4096-ptr_max
PARAM_VALUE 1 pipe_ctx->plane_res.hubp->funcs->hubp_wait_pipe_read_start 0,8092735316039704576
PARAM_VALUE 1 pipe_ctx->plane_state 4096-ptr_max
PARAM_VALUE 1 pipe_ctx->stream_res.stream_enc->vpg->funcs 642943893233741824,2358805471659520000
CAPPED_DATA 0 dc->res_pool->pipe_count 1
DATA_SOURCE 0 dc $0
DATA_SOURCE 1 pipe_ctx $1
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_hw_sequencer.c hwss_mpc_update_mpcc() -> (struct hwseq_private_funcs)->update_mpcc()

Type Parameter Key Value
PARAM_VALUE 0 dc->hwseq 4096-ptr_max
PARAM_VALUE 0 dc->hwseq->funcs.update_mpcc 1-u64max
PARAM_VALUE 1 pipe_ctx 0
NOCHECK_CALL