Defined in 1 files as a function:
Referenced in 1 files:
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c disable_link_output_symclk_on_tx_off() -> (struct clock_source_funcs)->program_pix_clk()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | clock_source | 4096-ptr_max |
| PARAM_VALUE | 0 | clock_source->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | pix_clk_params | 4096-ptr_max |
| PARAM_VALUE | 2 | encoding | 0 |
| PARAM_VALUE | 3 | pll_settings | 4096-ptr_max |
| DATA_SOURCE | 2 | encoding | $1 |
| CONTAINER | 0 | *(-8-0+0) | $(-1) |
| CONTAINER | 1 | -8-0-2192+56+1664 | $(-1) |
| CONTAINER | 3 | -8-0-2192+2200 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c dcn401_update_clocks_update_dtb_dto() -> (struct clock_source_funcs)->program_pix_clk()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | clock_source | 4096-ptr_max |
| PARAM_VALUE | 0 | clock_source->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | pix_clk_params | 4096-ptr_max |
| PARAM_VALUE | 1 | pix_clk_params->controller_id | 1-u32max |
| PARAM_VALUE | 2 | encoding | 0-2 |
| PARAM_VALUE | 3 | pll_settings | 4096-ptr_max |
| CONTAINER | 0 | *(-8-0+0) | $(-1) |
| CONTAINER | 1 | -8-0-2192+56+1664 | $(-1) |
| CONTAINER | 3 | -8-0-2192+2200 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn10/dcn10_hwseq.c dcn10_enable_stream_timing() -> (struct clock_source_funcs)->program_pix_clk()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | clock_source | 4096-ptr_max |
| PARAM_VALUE | 0 | clock_source->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | pix_clk_params | 4096-ptr_max |
| PARAM_VALUE | 2 | encoding | 0-2 |
| PARAM_VALUE | 3 | pll_settings | 4096-ptr_max |
| CONTAINER | 0 | *(-8-0+0) | $(-1) |
| CONTAINER | 1 | -8-0-2192+56+1664 | $(-1) |
| CONTAINER | 3 | -8-0-2192+2200 | $(-1) |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/accessories/link_dp_cts.c dp_retrain_link_dp_test() -> (struct clock_source_funcs)->program_pix_clk()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | clock_source | 4096-ptr_max |
| PARAM_VALUE | 0 | clock_source->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | pix_clk_params | 4096-ptr_max |
| PARAM_VALUE | 2 | encoding | 0-2 |
| PARAM_VALUE | 3 | pll_settings | 4096-ptr_max |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &adev->dm.dc_lock |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn20/dcn20_hwseq.c dcn20_enable_stream_timing() -> (struct clock_source_funcs)->program_pix_clk()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | clock_source | 4096-ptr_max |
| PARAM_VALUE | 0 | clock_source->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | pix_clk_params | 4096-ptr_max |
| PARAM_VALUE | 2 | encoding | 0-2 |
| PARAM_VALUE | 3 | pll_settings | 4096-ptr_max |
| CONTAINER | 0 | *(-8-0+0) | $(-1) |
| CONTAINER | 1 | -8-0-2192+56+1664 | $(-1) |
| CONTAINER | 3 | -8-0-2192+2200 | $(-1) |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dce110/dce110_hwseq.c dce110_enable_dp_link_output() -> (struct clock_source_funcs)->program_pix_clk()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | clock_source | 4096-ptr_max |
| PARAM_VALUE | 0 | clock_source->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | clock_source->id | 0-7,9-u32max |
| PARAM_VALUE | 1 | pix_clk_params | 4096-ptr_max |
| PARAM_VALUE | 2 | encoding | 0-2 |
| PARAM_VALUE | 3 | pll_settings | 4096-ptr_max |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dce110/dce110_hwseq.c dce110_enable_stream_timing() -> (struct clock_source_funcs)->program_pix_clk()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | clock_source | 4096-ptr_max |
| PARAM_VALUE | 0 | clock_source->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | pix_clk_params | 4096-ptr_max |
| PARAM_VALUE | 2 | encoding | 0-2 |
| PARAM_VALUE | 3 | pll_settings | 4096-ptr_max |
| CONTAINER | 0 | *(-8-0+0) | $(-1) |
| CONTAINER | 1 | -8-0-2192+56+1664 | $(-1) |
| CONTAINER | 3 | -8-0-2192+2200 | $(-1) |
drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c dcn60_update_clocks_update_dtb_dto() -> (struct clock_source_funcs)->program_pix_clk()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | clock_source | 4096-ptr_max |
| PARAM_VALUE | 0 | clock_source->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | pix_clk_params | 1720,4096-ptr_max |
| PARAM_VALUE | 1 | pix_clk_params->controller_id | 1-u32max |
| PARAM_VALUE | 2 | encoding | 0-2 |
| PARAM_VALUE | 3 | pll_settings | 2200,4096-ptr_max |
| CONTAINER | 0 | *(-8-0+0) | $(-1) |
| CONTAINER | 1 | -8-0-2192+56+1664 | $(-1) |
| CONTAINER | 3 | -8-0-2192+2200 | $(-1) |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c dcn401_enable_stream_timing() -> (struct clock_source_funcs)->program_pix_clk()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | clock_source | 4096-ptr_max |
| PARAM_VALUE | 0 | clock_source->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | pix_clk_params | 4096-ptr_max |
| PARAM_VALUE | 2 | encoding | 0-2 |
| PARAM_VALUE | 3 | pll_settings | 4096-ptr_max |
| CONTAINER | 0 | *(-8-0+0) | $(-1) |
| CONTAINER | 1 | -8-0-2192+56+1664 | $(-1) |
| CONTAINER | 3 | -8-0-2192+2200 | $(-1) |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c disable_link_output_symclk_on_tx_off() -> (struct clock_source_funcs)->program_pix_clk()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | clock_source | 4096-ptr_max |
| PARAM_VALUE | 0 | clock_source->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | pix_clk_params | 4096-ptr_max |
| PARAM_VALUE | 2 | encoding | 0 |
| PARAM_VALUE | 3 | pll_settings | 4096-ptr_max |
| DATA_SOURCE | 2 | encoding | $1 |
| CONTAINER | 0 | *(-8-0+0) | $(-1) |
| CONTAINER | 1 | -8-0-2192+56+1664 | $(-1) |
| CONTAINER | 3 | -8-0-2192+2200 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn314/dcn314_hwseq.c apply_symclk_on_tx_off_wa() -> (struct clock_source_funcs)->program_pix_clk()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | clock_source | 4096-ptr_max |
| PARAM_VALUE | 0 | clock_source->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | pix_clk_params | 4096-ptr_max |
| PARAM_VALUE | 2 | encoding | 0-2 |
| PARAM_VALUE | 3 | pll_settings | 4096-ptr_max |
| CONTAINER | 0 | *(-8-0+0) | $(-1) |
| CONTAINER | 1 | -8-0-2192+56+1664 | $(-1) |
| CONTAINER | 3 | -8-0-2192+2200 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn32/dcn32_hwseq.c apply_symclk_on_tx_off_wa() -> (struct clock_source_funcs)->program_pix_clk()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | clock_source | 4096-ptr_max |
| PARAM_VALUE | 0 | clock_source->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | pix_clk_params | 4096-ptr_max |
| PARAM_VALUE | 2 | encoding | 0-2 |
| PARAM_VALUE | 3 | pll_settings | 4096-ptr_max |
| CONTAINER | 0 | *(-8-0+0) | $(-1) |
| CONTAINER | 1 | -8-0-2192+56+1664 | $(-1) |
| CONTAINER | 3 | -8-0-2192+2200 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |