Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c dcn35_init_hw() -> (struct clk_mgr_funcs)->init_clocks()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr_base 4096-ptr_max
PARAM_VALUE 0 clk_mgr_base->funcs 4096-ptr_max
PARAM_VALUE 0 clk_mgr_base->funcs->init_clocks 4096-ptr_max
CONTAINER 0 *(-56-8+0) $(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 clk_mgr_base->boot_snapshot.dcf_deep_sleep_allow 0,16
HALF_LOCKED2 _T->lock

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn10/dcn10_hwseq.c dcn10_init_hw() -> (struct clk_mgr_funcs)->init_clocks()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr_base 4096-ptr_max
PARAM_VALUE 0 clk_mgr_base->funcs 4096-ptr_max
PARAM_VALUE 0 clk_mgr_base->funcs->init_clocks 4096-ptr_max
CONTAINER 0 *(-56-8+0) $(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 clk_mgr_base->boot_snapshot.dcf_deep_sleep_allow 0,16
HALF_LOCKED2 _T->lock

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn20/dcn20_hwseq.c dcn20_fpga_init_hw() -> (struct clk_mgr_funcs)->init_clocks()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr_base 4096-ptr_max
PARAM_VALUE 0 clk_mgr_base->funcs 4096-ptr_max
PARAM_VALUE 0 clk_mgr_base->funcs->init_clocks 4096-ptr_max
CONTAINER 0 *(-56-8+0) $(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn31/dcn31_hwseq.c dcn31_init_hw() -> (struct clk_mgr_funcs)->init_clocks()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr_base 4096-ptr_max
PARAM_VALUE 0 clk_mgr_base->funcs 4096-ptr_max
PARAM_VALUE 0 clk_mgr_base->funcs->init_clocks 4096-ptr_max
CONTAINER 0 *(-56-8+0) $(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 clk_mgr_base->boot_snapshot.dcf_deep_sleep_allow 0,16
HALF_LOCKED2 _T->lock