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Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 5 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn35/dcn35_resource.c dcn35_mpc_create() -> dcn32_mpc_construct()

Type Parameter Key Value
PARAM_VALUE 0 mpc30 4096-ptr_max
PARAM_VALUE 1 ctx 4096-ptr_max
PARAM_VALUE 1 ctx->dc_bios 4096-ptr_max
PARAM_VALUE 1 ctx->dcn_reg_offsets 4096-ptr_max
PARAM_VALUE 1 ctx->nbio_reg_offsets 4096-ptr_max
PARAM_VALUE 2 mpc_regs 5303779419940384768
PARAM_VALUE 3 mpc_shift 8986963246108057600
PARAM_VALUE 4 mpc_mask 9136222489631141888
PARAM_VALUE 5 num_mpcc 4
PARAM_VALUE 6 num_rmu 2
BUF_SIZE 0 mpc30 19808
BUF_SIZE 1 ctx->dc_bios->regs 12
DATA_SOURCE 0 mpc30 r _kzalloc_noprof
DATA_SOURCE 1 ctx $0
DATA_SOURCE 5 num_mpcc $1
DATA_SOURCE 6 num_rmu $2
NOCHECK_CALL
UNITS 5 num_mpcc unit_array_size
UNITS 6 num_rmu unit_array_size

drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn321/dcn321_resource.c dcn321_mpc_create() -> dcn32_mpc_construct()

Type Parameter Key Value
PARAM_VALUE 0 mpc30 4096-ptr_max
PARAM_VALUE 1 ctx 4096-ptr_max
PARAM_VALUE 1 ctx->dc_bios 4096-ptr_max
PARAM_VALUE 1 ctx->dcn_reg_offsets 4096-ptr_max
PARAM_VALUE 1 ctx->nbio_reg_offsets 4096-ptr_max
PARAM_VALUE 2 mpc_regs 462836367134031872
PARAM_VALUE 3 mpc_shift 1486607561113190400
PARAM_VALUE 4 mpc_mask 1809259975169048576
PARAM_VALUE 5 num_mpcc 4
PARAM_VALUE 6 num_rmu 4
BUF_SIZE 0 mpc30 19808
BUF_SIZE 1 ctx->dc_bios->regs 12
DATA_SOURCE 0 mpc30 r _kzalloc_noprof
DATA_SOURCE 1 ctx $0
DATA_SOURCE 5 num_mpcc $1
DATA_SOURCE 6 num_rmu $2
NOCHECK_CALL
UNITS 5 num_mpcc unit_array_size
UNITS 6 num_rmu unit_array_size

drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn36/dcn36_resource.c dcn35_mpc_create() -> dcn32_mpc_construct()

Type Parameter Key Value
PARAM_VALUE 0 mpc30 4096-ptr_max
PARAM_VALUE 1 ctx 4096-ptr_max
PARAM_VALUE 1 ctx->dc_bios 4096-ptr_max
PARAM_VALUE 1 ctx->dcn_reg_offsets 4096-ptr_max
PARAM_VALUE 1 ctx->nbio_reg_offsets 4096-ptr_max
PARAM_VALUE 2 mpc_regs 7247367300758831104
PARAM_VALUE 3 mpc_shift 5937567250802339840
PARAM_VALUE 4 mpc_mask 654043847777013760
PARAM_VALUE 5 num_mpcc 4
PARAM_VALUE 6 num_rmu 2
BUF_SIZE 0 mpc30 19808
BUF_SIZE 1 ctx->dc_bios->regs 12
DATA_SOURCE 0 mpc30 r _kzalloc_noprof
DATA_SOURCE 1 ctx $0
DATA_SOURCE 5 num_mpcc $1
DATA_SOURCE 6 num_rmu $2
NOCHECK_CALL
UNITS 5 num_mpcc unit_array_size
UNITS 6 num_rmu unit_array_size

drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn351/dcn351_resource.c dcn35_mpc_create() -> dcn32_mpc_construct()

Type Parameter Key Value
PARAM_VALUE 0 mpc30 4096-ptr_max
PARAM_VALUE 1 ctx 4096-ptr_max
PARAM_VALUE 1 ctx->dc_bios 4096-ptr_max
PARAM_VALUE 1 ctx->dcn_reg_offsets 4096-ptr_max
PARAM_VALUE 1 ctx->nbio_reg_offsets 4096-ptr_max
PARAM_VALUE 2 mpc_regs 5787038953933721600
PARAM_VALUE 3 mpc_shift 1636284167491833856
PARAM_VALUE 4 mpc_mask 7296402191179415552
PARAM_VALUE 5 num_mpcc 4
PARAM_VALUE 6 num_rmu 2
BUF_SIZE 0 mpc30 19808
BUF_SIZE 1 ctx->dc_bios->regs 12
DATA_SOURCE 0 mpc30 r _kzalloc_noprof
DATA_SOURCE 1 ctx $0
DATA_SOURCE 5 num_mpcc $1
DATA_SOURCE 6 num_rmu $2
NOCHECK_CALL
UNITS 5 num_mpcc unit_array_size
UNITS 6 num_rmu unit_array_size

drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn32/dcn32_resource.c dcn32_mpc_create() -> dcn32_mpc_construct()

Type Parameter Key Value
PARAM_VALUE 0 mpc30 4096-ptr_max
PARAM_VALUE 1 ctx 4096-ptr_max
PARAM_VALUE 1 ctx->dc_bios 4096-ptr_max
PARAM_VALUE 1 ctx->dcn_reg_offsets 4096-ptr_max
PARAM_VALUE 1 ctx->nbio_reg_offsets 4096-ptr_max
PARAM_VALUE 2 mpc_regs 3120480999388487680
PARAM_VALUE 3 mpc_shift 3579049134902382592
PARAM_VALUE 4 mpc_mask 1791842096520491008
PARAM_VALUE 5 num_mpcc 4
PARAM_VALUE 6 num_rmu 4
BUF_SIZE 0 mpc30 19808
BUF_SIZE 1 ctx->dc_bios->regs 12
DATA_SOURCE 0 mpc30 r _kzalloc_noprof
DATA_SOURCE 1 ctx $0
DATA_SOURCE 5 num_mpcc $1
DATA_SOURCE 6 num_rmu $2
NOCHECK_CALL
UNITS 5 num_mpcc unit_array_size
UNITS 6 num_rmu unit_array_size