Defined in 3 files as a function:
- drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c, line 1749 (as a function)
- drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c, line 1729 (as a function)
- drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c, line 1736 (as a function)
Referenced in 3 files:
- drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c, line 1780
- drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c, line 1760
- drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c, line 1767
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn35/dcn35_resource.c dcn35_dwbc_create() -> dcn35_dwbc_init()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dwbc30 | 4096-ptr_max |
| PARAM_VALUE | 0 | dwbc30->base.ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | dwbc30->base.funcs | 6403038284880015360 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->disable | 4944266288593166336 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->dwb_ogam_set_input_transfer_func | 6476469756521545728 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->dwb_set_scaler | 0 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->enable | 5249117686351056896 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->get_caps | 8513056145918566400 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->get_drr_time_stamp | 0 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->get_dwb_status | 0 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->is_enabled | 5239276925581619200 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->set_fc_enable | 5726601684680380416 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->set_new_content | 247584470449500160 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->set_stereo | 2441622018407710720 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->set_warmup | 0 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->update | 8899442013365248000 |
| PARAM_VALUE | 0 | dwbc30->base.inst | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_mask | 2337839598396690432 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs | 3104568070538223616 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBCP_DEBUG | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBSCL_BOUNDARY_CTRL | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBSCL_DEBUG | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBSCL_DEST_SIZE | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBSCL_MODE | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBSCL_TAP_CONTROL | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWB_DEBUG | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWB_DEBUG_CTRL | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWB_TEST_DEBUG_DATA | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWB_TEST_DEBUG_INDEX | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_shift | 4739702011235880960 |
| PARAM_VALUE | 1 | ctx | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx->dc_bios | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx->dc_bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx->dc_bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 1 | ctx->dc_bios->regs | 1234612507932188672 |
| PARAM_VALUE | 1 | ctx->dcn_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx->nbio_reg_offsets | 4096-ptr_max |
| BUF_SIZE | 0 | dwbc30 | 328 |
| BUF_SIZE | 1 | ctx->dc_bios->regs | 12 |
| DATA_SOURCE | 0 | dwbc30 | r _kzalloc_noprof |
| DATA_SOURCE | 1 | ctx | $0 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn36/dcn36_resource.c dcn35_dwbc_create() -> dcn35_dwbc_init()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dwbc30 | 4096-ptr_max |
| PARAM_VALUE | 0 | dwbc30->base.ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | dwbc30->base.funcs | 6403038284880015360 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->disable | 4944266288593166336 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->dwb_ogam_set_input_transfer_func | 6476469756521545728 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->dwb_set_scaler | 0 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->enable | 5249117686351056896 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->get_caps | 8513056145918566400 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->get_drr_time_stamp | 0 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->get_dwb_status | 0 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->is_enabled | 5239276925581619200 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->set_fc_enable | 5726601684680380416 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->set_new_content | 247584470449500160 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->set_stereo | 2441622018407710720 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->set_warmup | 0 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->update | 8899442013365248000 |
| PARAM_VALUE | 0 | dwbc30->base.inst | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_mask | 2901189735627976704 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs | 5739092591629606912 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBCP_DEBUG | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBSCL_BOUNDARY_CTRL | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBSCL_DEBUG | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBSCL_DEST_SIZE | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBSCL_MODE | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBSCL_TAP_CONTROL | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWB_DEBUG | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWB_DEBUG_CTRL | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWB_TEST_DEBUG_DATA | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWB_TEST_DEBUG_INDEX | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_shift | 6435761130944688128 |
| PARAM_VALUE | 1 | ctx | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx->dc_bios | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx->dc_bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx->dc_bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 1 | ctx->dc_bios->regs | 6273219606796263424 |
| PARAM_VALUE | 1 | ctx->dcn_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx->nbio_reg_offsets | 4096-ptr_max |
| BUF_SIZE | 0 | dwbc30 | 328 |
| BUF_SIZE | 1 | ctx->dc_bios->regs | 12 |
| DATA_SOURCE | 0 | dwbc30 | r _kzalloc_noprof |
| DATA_SOURCE | 1 | ctx | $0 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn351/dcn351_resource.c dcn35_dwbc_create() -> dcn35_dwbc_init()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dwbc30 | 4096-ptr_max |
| PARAM_VALUE | 0 | dwbc30->base.ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | dwbc30->base.funcs | 6403038284880015360 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->disable | 4944266288593166336 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->dwb_ogam_set_input_transfer_func | 6476469756521545728 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->dwb_set_scaler | 0 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->enable | 5249117686351056896 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->get_caps | 8513056145918566400 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->get_drr_time_stamp | 0 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->get_dwb_status | 0 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->is_enabled | 5239276925581619200 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->set_fc_enable | 5726601684680380416 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->set_new_content | 247584470449500160 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->set_stereo | 2441622018407710720 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->set_warmup | 0 |
| PARAM_VALUE | 0 | dwbc30->base.funcs->update | 8899442013365248000 |
| PARAM_VALUE | 0 | dwbc30->base.inst | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_mask | 3311578517750722560 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs | 2776772358825717760 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBCP_DEBUG | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBSCL_BOUNDARY_CTRL | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBSCL_DEBUG | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBSCL_DEST_SIZE | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBSCL_MODE | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWBSCL_TAP_CONTROL | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWB_DEBUG | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWB_DEBUG_CTRL | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWB_TEST_DEBUG_DATA | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_regs->DWB_TEST_DEBUG_INDEX | 0 |
| PARAM_VALUE | 0 | dwbc30->dwbc_shift | 5350496372278251520 |
| PARAM_VALUE | 1 | ctx | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx->dc_bios | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx->dc_bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx->dc_bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 1 | ctx->dc_bios->regs | 132898455781953536 |
| PARAM_VALUE | 1 | ctx->dcn_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx->nbio_reg_offsets | 4096-ptr_max |
| BUF_SIZE | 0 | dwbc30 | 328 |
| BUF_SIZE | 1 | ctx->dc_bios->regs | 12 |
| DATA_SOURCE | 0 | dwbc30 | r _kzalloc_noprof |
| DATA_SOURCE | 1 | ctx | $0 |
| NOCHECK_CALL |