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Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 2 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c dcn35_hardware_release() -> (struct hw_sequencer_funcs)->root_clock_control()

Type Parameter Key Value
PARAM_VALUE 0 dc 4096-ptr_max
PARAM_VALUE 0 dc->clk_mgr->funcs->notify_cstate_disable 0,3948512266653224960
PARAM_VALUE 0 dc->hwss.root_clock_control 1-u64max
PARAM_VALUE 0 dc->res_pool 4096-ptr_max
PARAM_VALUE 1 update_state 3169139455387385856
PARAM_VALUE 2 power_on 1
CAPPED_DATA 0 dc->res_pool->pipe_count 1
DATA_SOURCE 0 dc $0
CONTAINER 0 -904-218664+0 $(-1)
MEM_ZERO 1 update_state
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c dcn35_optimize_bandwidth() -> (struct hw_sequencer_funcs)->root_clock_control()

Type Parameter Key Value
PARAM_VALUE 0 dc 4096-ptr_max
PARAM_VALUE 0 dc->clk_mgr 4096-ptr_max
PARAM_VALUE 0 dc->clk_mgr->funcs 4096-ptr_max
PARAM_VALUE 0 dc->clk_mgr->funcs->update_clocks 4096-ptr_max
PARAM_VALUE 0 dc->hwss.calc_blocks_to_gate 1-u64max
PARAM_VALUE 0 dc->hwss.root_clock_control 1-u64max
PARAM_VALUE 0 dc->res_pool 4096-ptr_max
PARAM_VALUE 0 dc->res_pool->hubbub 4096-ptr_max
PARAM_VALUE 0 dc->res_pool->hubbub->funcs 4096-ptr_max
PARAM_VALUE 0 dc->res_pool->hubbub->funcs->program_watermarks 4096-ptr_max
PARAM_VALUE 0 dc->res_pool->res_cap->num_dsc 0,2-6
PARAM_VALUE 1 update_state 7598623063853973504
PARAM_VALUE 2 power_on 0
CAPPED_DATA 0 dc->link_count 1
CAPPED_DATA 0 dc->res_pool->hpo_dp_stream_enc_count 1
CAPPED_DATA 0 dc->res_pool->hpo_frl_stream_enc_count 1
CAPPED_DATA 0 dc->res_pool->pipe_count 1
CAPPED_DATA 0 dc->res_pool->timing_generator_count 1
DATA_SOURCE 0 dc $0
CONTAINER 0 -904-218664+0 $(-1)
MEM_ZERO 1 update_state
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c dcn35_prepare_bandwidth() -> (struct hw_sequencer_funcs)->root_clock_control()

Type Parameter Key Value
PARAM_VALUE 0 dc 4096-ptr_max
PARAM_VALUE 0 dc->hwss.calc_blocks_to_ungate 1-u64max
PARAM_VALUE 0 dc->hwss.root_clock_control 1-u64max
PARAM_VALUE 1 update_state 7207834346160054272
PARAM_VALUE 2 power_on 1
CAPPED_DATA 0 dc->link_count 1
CAPPED_DATA 0 dc->res_pool->hpo_dp_stream_enc_count 1
CAPPED_DATA 0 dc->res_pool->hpo_frl_stream_enc_count 1
CAPPED_DATA 0 dc->res_pool->pipe_count 1
DATA_SOURCE 0 dc $0
CONTAINER 0 -904-218664+0 $(-1)
MEM_ZERO 1 update_state
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn42/dcn42_hwseq.c dcn42_optimize_bandwidth() -> (struct hw_sequencer_funcs)->root_clock_control()

Type Parameter Key Value
PARAM_VALUE 0 dc 4096-ptr_max
PARAM_VALUE 0 dc->clk_mgr 4096-ptr_max
PARAM_VALUE 0 dc->clk_mgr->funcs 4096-ptr_max
PARAM_VALUE 0 dc->clk_mgr->funcs->update_clocks 4096-ptr_max
PARAM_VALUE 0 dc->ctx->dmub_srv->dmub->debug.gpint_datain0 0
PARAM_VALUE 0 dc->ctx->dmub_srv->dmub->debug.is_cw0_enabled 0
PARAM_VALUE 0 dc->ctx->dmub_srv->dmub->debug.is_dmcub_secure_reset 0
PARAM_VALUE 0 dc->ctx->dmub_srv->dmub->debug.is_pwait 0
PARAM_VALUE 0 dc->ctx->dmub_srv->dmub->debug.outbox1_rptr 0
PARAM_VALUE 0 dc->ctx->dmub_srv->dmub->debug.outbox1_size 0
PARAM_VALUE 0 dc->ctx->dmub_srv->dmub->debug.outbox1_wptr 0
PARAM_VALUE 0 dc->ctx->dmub_srv->dmub->ib_mem_gart.cpu_addr->global.features.all 0
PARAM_VALUE 0 dc->ctx->dmub_srv->dmub->ib_mem_gart.cpu_addr->global.features.bits.enable 0-1
PARAM_VALUE 0 dc->ctx->dmub_srv->dmub->ib_mem_gart.cpu_addr->global.features.bits.enable_debug 0-1
PARAM_VALUE 0 dc->ctx->dmub_srv->dmub->ib_mem_gart.cpu_addr->global.features.bits.reserved 0
PARAM_VALUE 0 dc->ctx->dmub_srv->dmub->ib_mem_gart.cpu_addr->global.lock_wait_time_us 0
PARAM_VALUE 0 dc->ctx->dmub_srv->dmub->ib_mem_gart.cpu_addr->global.max_allow_delay_us 0
PARAM_VALUE 0 dc->ctx->dmub_srv->dmub->ib_mem_gart.cpu_addr->global.num_streams 0
PARAM_VALUE 0 dc->ctx->dmub_srv->dmub->ib_mem_gart.cpu_addr->global.recovery_timeout_us 0
PARAM_VALUE 0 dc->hwss.calc_blocks_to_gate 1-u64max
PARAM_VALUE 0 dc->hwss.root_clock_control 1-u64max
PARAM_VALUE 0 dc->res_pool 4096-ptr_max
PARAM_VALUE 0 dc->res_pool->hubbub 4096-ptr_max
PARAM_VALUE 0 dc->res_pool->hubbub->funcs 4096-ptr_max
PARAM_VALUE 0 dc->res_pool->hubbub->funcs->program_watermarks 4096-ptr_max
PARAM_VALUE 0 dc->res_pool->res_cap->num_dsc 0,2-6
PARAM_VALUE 1 update_state 5341590886052331520
PARAM_VALUE 2 power_on 0
CAPPED_DATA 0 dc->link_count 1
CAPPED_DATA 0 dc->res_pool->hpo_dp_stream_enc_count 1
CAPPED_DATA 0 dc->res_pool->hpo_frl_stream_enc_count 1
CAPPED_DATA 0 dc->res_pool->pipe_count 1
CAPPED_DATA 0 dc->res_pool->timing_generator_count 1
DATA_SOURCE 0 dc $0
CONTAINER 0 -904-218664+0 $(-1)
MEM_ZERO 1 update_state
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn42/dcn42_hwseq.c dcn42_prepare_bandwidth() -> (struct hw_sequencer_funcs)->root_clock_control()

Type Parameter Key Value
PARAM_VALUE 0 dc 4096-ptr_max
PARAM_VALUE 0 dc->hwss.calc_blocks_to_ungate 1-u64max
PARAM_VALUE 0 dc->hwss.root_clock_control 1-u64max
PARAM_VALUE 1 update_state 6288659435060494336
PARAM_VALUE 2 power_on 1
CAPPED_DATA 0 dc->link_count 1
CAPPED_DATA 0 dc->res_pool->hpo_dp_stream_enc_count 1
CAPPED_DATA 0 dc->res_pool->hpo_frl_stream_enc_count 1
CAPPED_DATA 0 dc->res_pool->pipe_count 1
DATA_SOURCE 0 dc $0
CONTAINER 0 -904-218664+0 $(-1)
MEM_ZERO 1 update_state
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL