Defined in 1 files as a function:
Referenced in 1 files:
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn42/dcn42_resource.c dcn42_resource_construct() -> dcn42_clock_source_create()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->cgs_device | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.saved_flags | 0-4294967295 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageDCCCompressionRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.BPP | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.BandwidthAvailableForImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CriticalPoint | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CursorBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CursorChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DCFCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DCFCLKDeepSleep | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DETBufferSizeInTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKRampingMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithoutRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLK_calculated | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelayCNVCCursor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelayCNVCFormater | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySCL | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySCLLBOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMChannelWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeLatencyOverride | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Downspreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETPlusLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETPlusLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveFECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FCLKChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricAndDRAMBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricClock | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalFillMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FractionOfUrgentBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FractionOfUrgentBandwidthImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.GPUVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.GlobalDPPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.HostVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.InitFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LastPixelOfLineExtraWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesInDETChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesInDETLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDCHUBToPSCLThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDispclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDppclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxPSCLToLBThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxTotalVActiveRDBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVRatioPre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumReadBandwidthWithPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumReadBandwidthWithoutPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInDETBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBufferChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBufferLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthSupport | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveDRAMClockChangeMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinPixelChunkSizeBytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinUrgentLatencySupportUs | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NextMaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NonUrgentLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NumberOfChannels | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Outbpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PTEGroupSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PartOfBurstThatFitsInROB | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine2To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine4To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RemainingFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBW | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBWToDCNPerState | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBandwidthToDCN | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBusWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundTripPingLatencyCycles | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SMNLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SOCCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SREnterPlusExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SREnterPlusExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SRExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SRExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SmallestVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SrcActiveDrainRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterBurstTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterPeriod | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterPeriodBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SurfaceRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SurfaceRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthGranularityC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthGranularityY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthYCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TFinalxFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TInitXFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TWait | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TimeCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalBandwidthConsumedGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalDSCUnitsRequired | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalDataReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalNumberOfActiveOTG | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalRowReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TslvChk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.USRRetrainingLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencySupportUsChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencySupportUsLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.VBlankTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.VStartupMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.FCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.USRRetrainingWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackFCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackChromaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackInterfaceBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferChromaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferLumaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLumaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxHSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxVSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMinHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMinVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCBusTransportTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCFillBWOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCFillConstant | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCSlvChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVreadyOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVupdateOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVupdateWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.bpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dst_x_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dst_y_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dummy5 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dummy6 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.total_dcn_read_bw_with_flip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc_bios | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc_bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc_bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 0 | ctx->dc_bios->regs | 8918717857038331904 |
| PARAM_VALUE | 0 | ctx->dcn_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->nbio_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 0 | *ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 1 | bios | 4096-ptr_max |
| PARAM_VALUE | 1 | bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 1 | bios->regs | 8918717857038331904 |
| PARAM_VALUE | 2 | id | 9 |
| PARAM_VALUE | 3 | regs | 578857703674765312 |
| PARAM_VALUE | 4 | dp_clk_src | 0 |
| BUF_SIZE | 0 | ctx->dc_bios->regs | 12 |
| BUF_SIZE | 1 | bios->regs | 12 |
| BUF_SIZE | 3 | regs | 440 |
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn42/dcn42_resource.c dcn42_resource_construct() -> dcn42_clock_source_create()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->cgs_device | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.saved_flags | 0-4294967295 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageDCCCompressionRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.BPP | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.BandwidthAvailableForImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CriticalPoint | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CursorBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CursorChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DCFCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DCFCLKDeepSleep | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DETBufferSizeInTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKRampingMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithoutRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLK_calculated | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelayCNVCCursor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelayCNVCFormater | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySCL | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySCLLBOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMChannelWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeLatencyOverride | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Downspreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETPlusLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETPlusLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveFECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FCLKChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricAndDRAMBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricClock | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalFillMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FractionOfUrgentBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FractionOfUrgentBandwidthImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.GPUVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.GlobalDPPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.HostVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.InitFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LastPixelOfLineExtraWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesInDETChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesInDETLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDCHUBToPSCLThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDispclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDppclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxPSCLToLBThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxTotalVActiveRDBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVRatioPre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumReadBandwidthWithPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumReadBandwidthWithoutPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInDETBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBufferChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBufferLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthSupport | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveDRAMClockChangeMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinPixelChunkSizeBytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinUrgentLatencySupportUs | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NextMaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NonUrgentLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NumberOfChannels | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Outbpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PTEGroupSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PartOfBurstThatFitsInROB | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine2To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine4To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RemainingFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBW | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBWToDCNPerState | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBandwidthToDCN | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBusWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundTripPingLatencyCycles | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SMNLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SOCCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SREnterPlusExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SREnterPlusExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SRExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SRExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SmallestVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SrcActiveDrainRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterBurstTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterPeriod | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterPeriodBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SurfaceRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SurfaceRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthGranularityC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthGranularityY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthYCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TFinalxFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TInitXFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TWait | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TimeCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalBandwidthConsumedGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalDSCUnitsRequired | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalDataReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalNumberOfActiveOTG | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalRowReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TslvChk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.USRRetrainingLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencySupportUsChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencySupportUsLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.VBlankTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.VStartupMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.FCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.USRRetrainingWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackFCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackChromaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackInterfaceBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferChromaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferLumaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLumaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxHSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxVSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMinHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMinVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCBusTransportTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCFillBWOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCFillConstant | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCSlvChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVreadyOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVupdateOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVupdateWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.bpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dst_x_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dst_y_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dummy5 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dummy6 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.total_dcn_read_bw_with_flip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc_bios | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc_bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc_bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 0 | ctx->dc_bios->regs | 8918717857038331904 |
| PARAM_VALUE | 0 | ctx->dcn_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->nbio_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 0 | *ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 1 | bios | 4096-ptr_max |
| PARAM_VALUE | 1 | bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 1 | bios->regs | 8918717857038331904 |
| PARAM_VALUE | 2 | id | 10 |
| PARAM_VALUE | 3 | regs | 578857703674765316 |
| PARAM_VALUE | 4 | dp_clk_src | 0 |
| BUF_SIZE | 0 | ctx->dc_bios->regs | 12 |
| BUF_SIZE | 1 | bios->regs | 12 |
| BUF_SIZE | 3 | regs | 352 |
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn42/dcn42_resource.c dcn42_resource_construct() -> dcn42_clock_source_create()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->cgs_device | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.saved_flags | 0-4294967295 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageDCCCompressionRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.BPP | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.BandwidthAvailableForImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CriticalPoint | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CursorBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CursorChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DCFCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DCFCLKDeepSleep | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DETBufferSizeInTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKRampingMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithoutRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLK_calculated | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelayCNVCCursor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelayCNVCFormater | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySCL | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySCLLBOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMChannelWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeLatencyOverride | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Downspreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETPlusLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETPlusLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveFECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FCLKChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricAndDRAMBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricClock | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalFillMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FractionOfUrgentBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FractionOfUrgentBandwidthImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.GPUVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.GlobalDPPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.HostVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.InitFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LastPixelOfLineExtraWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesInDETChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesInDETLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDCHUBToPSCLThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDispclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDppclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxPSCLToLBThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxTotalVActiveRDBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVRatioPre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumReadBandwidthWithPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumReadBandwidthWithoutPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInDETBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBufferChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBufferLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthSupport | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveDRAMClockChangeMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinPixelChunkSizeBytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinUrgentLatencySupportUs | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NextMaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NonUrgentLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NumberOfChannels | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Outbpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PTEGroupSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PartOfBurstThatFitsInROB | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine2To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine4To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RemainingFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBW | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBWToDCNPerState | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBandwidthToDCN | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBusWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundTripPingLatencyCycles | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SMNLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SOCCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SREnterPlusExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SREnterPlusExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SRExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SRExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SmallestVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SrcActiveDrainRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterBurstTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterPeriod | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterPeriodBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SurfaceRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SurfaceRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthGranularityC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthGranularityY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthYCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TFinalxFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TInitXFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TWait | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TimeCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalBandwidthConsumedGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalDSCUnitsRequired | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalDataReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalNumberOfActiveOTG | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalRowReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TslvChk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.USRRetrainingLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencySupportUsChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencySupportUsLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.VBlankTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.VStartupMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.FCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.USRRetrainingWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackFCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackChromaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackInterfaceBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferChromaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferLumaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLumaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxHSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxVSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMinHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMinVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCBusTransportTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCFillBWOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCFillConstant | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCSlvChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVreadyOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVupdateOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVupdateWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.bpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dst_x_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dst_y_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dummy5 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dummy6 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.total_dcn_read_bw_with_flip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc_bios | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc_bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc_bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 0 | ctx->dc_bios->regs | 8918717857038331904 |
| PARAM_VALUE | 0 | ctx->dcn_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->nbio_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 0 | *ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 1 | bios | 4096-ptr_max |
| PARAM_VALUE | 1 | bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 1 | bios->regs | 8918717857038331904 |
| PARAM_VALUE | 2 | id | 11 |
| PARAM_VALUE | 3 | regs | 578857703674765320 |
| PARAM_VALUE | 4 | dp_clk_src | 0 |
| BUF_SIZE | 0 | ctx->dc_bios->regs | 12 |
| BUF_SIZE | 1 | bios->regs | 12 |
| BUF_SIZE | 3 | regs | 264 |
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn42/dcn42_resource.c dcn42_resource_construct() -> dcn42_clock_source_create()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->cgs_device | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.saved_flags | 0-4294967295 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageDCCCompressionRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.BPP | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.BandwidthAvailableForImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CriticalPoint | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CursorBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CursorChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DCFCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DCFCLKDeepSleep | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DETBufferSizeInTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKRampingMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithoutRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLK_calculated | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelayCNVCCursor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelayCNVCFormater | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySCL | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySCLLBOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMChannelWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeLatencyOverride | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Downspreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETPlusLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETPlusLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveFECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FCLKChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricAndDRAMBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricClock | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalFillMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FractionOfUrgentBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FractionOfUrgentBandwidthImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.GPUVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.GlobalDPPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.HostVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.InitFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LastPixelOfLineExtraWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesInDETChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesInDETLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDCHUBToPSCLThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDispclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDppclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxPSCLToLBThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxTotalVActiveRDBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVRatioPre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumReadBandwidthWithPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumReadBandwidthWithoutPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInDETBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBufferChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBufferLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthSupport | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveDRAMClockChangeMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinPixelChunkSizeBytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinUrgentLatencySupportUs | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NextMaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NonUrgentLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NumberOfChannels | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Outbpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PTEGroupSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PartOfBurstThatFitsInROB | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine2To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine4To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RemainingFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBW | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBWToDCNPerState | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBandwidthToDCN | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBusWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundTripPingLatencyCycles | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SMNLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SOCCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SREnterPlusExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SREnterPlusExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SRExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SRExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SmallestVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SrcActiveDrainRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterBurstTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterPeriod | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterPeriodBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SurfaceRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SurfaceRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthGranularityC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthGranularityY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthYCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TFinalxFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TInitXFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TWait | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TimeCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalBandwidthConsumedGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalDSCUnitsRequired | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalDataReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalNumberOfActiveOTG | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalRowReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TslvChk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.USRRetrainingLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencySupportUsChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencySupportUsLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.VBlankTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.VStartupMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.FCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.USRRetrainingWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackFCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackChromaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackInterfaceBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferChromaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferLumaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLumaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxHSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxVSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMinHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMinVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCBusTransportTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCFillBWOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCFillConstant | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCSlvChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVreadyOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVupdateOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVupdateWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.bpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dst_x_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dst_y_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dummy5 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dummy6 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.total_dcn_read_bw_with_flip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc_bios | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc_bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc_bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 0 | ctx->dc_bios->regs | 8918717857038331904 |
| PARAM_VALUE | 0 | ctx->dcn_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->nbio_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 0 | *ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 1 | bios | 4096-ptr_max |
| PARAM_VALUE | 1 | bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 1 | bios->regs | 8918717857038331904 |
| PARAM_VALUE | 2 | id | 12 |
| PARAM_VALUE | 3 | regs | 578857703674765324 |
| PARAM_VALUE | 4 | dp_clk_src | 0 |
| BUF_SIZE | 0 | ctx->dc_bios->regs | 12 |
| BUF_SIZE | 1 | bios->regs | 12 |
| BUF_SIZE | 3 | regs | 176 |
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn42/dcn42_resource.c dcn42_resource_construct() -> dcn42_clock_source_create()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->cgs_device | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.saved_flags | 0-4294967295 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageDCCCompressionRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.BPP | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.BandwidthAvailableForImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CriticalPoint | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CursorBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CursorChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DCFCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DCFCLKDeepSleep | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DETBufferSizeInTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKRampingMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithoutRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLK_calculated | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelayCNVCCursor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelayCNVCFormater | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySCL | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySCLLBOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMChannelWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeLatencyOverride | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Downspreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETPlusLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETPlusLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveFECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FCLKChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricAndDRAMBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricClock | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalFillMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FractionOfUrgentBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FractionOfUrgentBandwidthImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.GPUVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.GlobalDPPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.HostVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.InitFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LastPixelOfLineExtraWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesInDETChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesInDETLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDCHUBToPSCLThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDispclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDppclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxPSCLToLBThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxTotalVActiveRDBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVRatioPre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumReadBandwidthWithPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumReadBandwidthWithoutPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInDETBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBufferChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBufferLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthSupport | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveDRAMClockChangeMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinPixelChunkSizeBytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinUrgentLatencySupportUs | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NextMaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NonUrgentLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NumberOfChannels | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Outbpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PTEGroupSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PartOfBurstThatFitsInROB | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine2To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine4To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RemainingFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBW | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBWToDCNPerState | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBandwidthToDCN | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBusWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundTripPingLatencyCycles | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SMNLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SOCCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SREnterPlusExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SREnterPlusExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SRExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SRExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SmallestVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SrcActiveDrainRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterBurstTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterPeriod | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterPeriodBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SurfaceRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SurfaceRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthGranularityC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthGranularityY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthYCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TFinalxFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TInitXFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TWait | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TimeCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalBandwidthConsumedGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalDSCUnitsRequired | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalDataReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalNumberOfActiveOTG | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalRowReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TslvChk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.USRRetrainingLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencySupportUsChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencySupportUsLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.VBlankTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.VStartupMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.FCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.USRRetrainingWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackFCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackChromaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackInterfaceBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferChromaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferLumaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLumaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxHSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxVSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMinHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMinVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCBusTransportTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCFillBWOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCFillConstant | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCSlvChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVreadyOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVupdateOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVupdateWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.bpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dst_x_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dst_y_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dummy5 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dummy6 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.total_dcn_read_bw_with_flip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc_bios | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc_bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc_bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 0 | ctx->dc_bios->regs | 8918717857038331904 |
| PARAM_VALUE | 0 | ctx->dcn_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->nbio_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 0 | *ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 1 | bios | 4096-ptr_max |
| PARAM_VALUE | 1 | bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 1 | bios->regs | 8918717857038331904 |
| PARAM_VALUE | 2 | id | 13 |
| PARAM_VALUE | 3 | regs | 578857703674765328 |
| PARAM_VALUE | 4 | dp_clk_src | 0 |
| BUF_SIZE | 0 | ctx->dc_bios->regs | 12 |
| BUF_SIZE | 1 | bios->regs | 12 |
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn42/dcn42_resource.c dcn42_resource_construct() -> dcn42_clock_source_create()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->cgs_device | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.saved_flags | 0-4294967295 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageDCCCompressionRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.BPP | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.BandwidthAvailableForImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CriticalPoint | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CursorBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CursorChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DCFCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DCFCLKDeepSleep | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DETBufferSizeInTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKRampingMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithoutRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLK_calculated | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelayCNVCCursor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelayCNVCFormater | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySCL | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySCLLBOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMChannelWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeLatencyOverride | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Downspreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETPlusLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETPlusLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveFECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FCLKChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricAndDRAMBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricClock | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalFillMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FractionOfUrgentBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FractionOfUrgentBandwidthImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.GPUVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.GlobalDPPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.HostVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.InitFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LastPixelOfLineExtraWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesInDETChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesInDETLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDCHUBToPSCLThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDispclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDppclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxPSCLToLBThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxTotalVActiveRDBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVRatioPre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumReadBandwidthWithPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumReadBandwidthWithoutPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInDETBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBufferChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBufferLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthSupport | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveDRAMClockChangeMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinPixelChunkSizeBytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinUrgentLatencySupportUs | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NextMaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NonUrgentLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NumberOfChannels | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Outbpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PTEGroupSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PartOfBurstThatFitsInROB | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine2To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine4To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RemainingFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBW | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBWToDCNPerState | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBandwidthToDCN | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBusWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundTripPingLatencyCycles | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SMNLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SOCCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SREnterPlusExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SREnterPlusExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SRExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SRExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SmallestVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SrcActiveDrainRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterBurstTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterPeriod | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterPeriodBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SurfaceRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SurfaceRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthGranularityC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthGranularityY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthYCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TFinalxFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TInitXFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TWait | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TimeCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalBandwidthConsumedGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalDSCUnitsRequired | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalDataReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalNumberOfActiveOTG | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalRowReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TslvChk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.USRRetrainingLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencySupportUsChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencySupportUsLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.VBlankTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.VStartupMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.FCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.USRRetrainingWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackFCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackChromaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackInterfaceBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferChromaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferLumaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLumaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxHSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxVSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMinHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMinVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCBusTransportTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCFillBWOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCFillConstant | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCSlvChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVreadyOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVupdateOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVupdateWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.bpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dst_x_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dst_y_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dummy5 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dummy6 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.total_dcn_read_bw_with_flip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc_bios | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc_bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc_bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 0 | ctx->dc_bios->regs | 8918717857038331904 |
| PARAM_VALUE | 0 | ctx->dcn_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->nbio_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 0 | *ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 1 | bios | 4096-ptr_max |
| PARAM_VALUE | 1 | bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 1 | bios->regs | 8918717857038331904 |
| PARAM_VALUE | 2 | id | 8 |
| PARAM_VALUE | 3 | regs | 578857703674765312 |
| PARAM_VALUE | 4 | dp_clk_src | 1 |
| BUF_SIZE | 0 | ctx->dc_bios->regs | 12 |
| BUF_SIZE | 1 | bios->regs | 12 |
| BUF_SIZE | 3 | regs | 440 |