Defined in 2 files as a function:
- drivers/dma/xilinx/xilinx_dma.c, line 560 (as a function)
- drivers/gpu/drm/i915/gvt/handlers.c, line 1639 (as a function)
Referenced in 2 files:
Smatch caller information:
drivers/dma/xilinx/xilinx_dma.c dma_ctrl_clr() -> dma_ctrl_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->xdev | 4096-ptr_max |
| PARAM_VALUE | 1 | reg | 0 |
| CAPPED_DATA | 2 | value | 1 |
| DATA_SOURCE | 0 | chan | $0 |
| DATA_SOURCE | 1 | reg | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 2 | value | 0-u32max |
| HALF_LOCKED2 | 0 | &chan->lock |
drivers/dma/xilinx/xilinx_dma.c dma_ctrl_set() -> dma_ctrl_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->dev->cma_area->nranges | s32min-s32max |
| PARAM_VALUE | 0 | chan->xdev | 4096-ptr_max |
| PARAM_VALUE | 1 | reg | 0 |
| BUF_SIZE | 0 | chan | (-1),544 |
| BUF_SIZE | 0 | chan | (-1),544 |
| BUF_SIZE | 0 | chan->common.device | (-1),464 |
| BUF_SIZE | 0 | chan->desc_pool | (-1),192 |
| BUF_SIZE | 0 | chan->dev | (-1),1616 |
| DATA_SOURCE | 0 | chan | $0 |
| DATA_SOURCE | 1 | reg | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | chan->config.vflip_en | 0-1 |
| HOST_DATA | 2 | value | 0-u32max |
| HALF_LOCKED2 | 0 | &chan->lock |
drivers/dma/xilinx/xilinx_dma.c xilinx_cdma_start_transfer() -> dma_ctrl_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->desc_pendingcount | 0-255 |
| PARAM_VALUE | 0 | chan->err | 0 |
| PARAM_VALUE | 0 | chan->idle | 1 |
| PARAM_VALUE | 0 | chan->xdev | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->xdev->regs | 0-ptr_max |
| PARAM_VALUE | 1 | reg | 0 |
| CAPPED_DATA | 0 | &chan->pending_list | 1 |
| DATA_SOURCE | 0 | chan | $0 |
| FUZZY_MAX | 0 | chan->desc_pendingcount | 255 |
| PARAM_COMPARE | 0 | &chan->pending_list | != $0->pending_list.next |
| HARD_MAX | 0 | chan->desc_pendingcount | 255 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 2 | value | 0-u32max[c] |
| LOCK2 | 0 | &chan->lock | |
| HALF_LOCKED2 | flags | ||
| TYPE_LOCK | (struct xilinx_dma_chan)->lock |
drivers/dma/xilinx/xilinx_dma.c xilinx_cdma_start_transfer() -> dma_ctrl_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->err | 0 |
| PARAM_VALUE | 0 | chan->has_sg | 0 |
| PARAM_VALUE | 0 | chan->idle | 1 |
| PARAM_VALUE | 0 | chan->xdev | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->xdev->regs | 0-ptr_max |
| PARAM_VALUE | 1 | reg | 40 |
| CAPPED_DATA | 0 | &chan->pending_list | 1 |
| CAPPED_DATA | 2 | value | 1 |
| DATA_SOURCE | 0 | chan | $0 |
| PARAM_COMPARE | 0 | &chan->pending_list | != $0->pending_list.next |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | 0 | &chan->lock | |
| HALF_LOCKED2 | flags | ||
| TYPE_LOCK | (struct xilinx_dma_chan)->lock |
drivers/dma/xilinx/xilinx_dma.c xilinx_dma_irq_handler() -> dma_ctrl_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->xdev | 4096-ptr_max |
| PARAM_VALUE | 1 | reg | 4 |
| PARAM_VALUE | 2 | value | 0,4096-28672 |
| DATA_SOURCE | 0 | chan | $1 |
| BIT_INFO | 2 | value | 0x0,0x7000 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 2 | value | 0,4096-28672 |
| HALF_LOCKED2 | &desc->request_mutex | ||
| HALF_LOCKED2 | flags |
drivers/dma/xilinx/xilinx_dma.c xilinx_dma_irq_handler() -> dma_ctrl_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->xdev | 4096-ptr_max |
| PARAM_VALUE | 1 | reg | 4 |
| PARAM_VALUE | 2 | value | 0,16-2448 |
| DATA_SOURCE | 0 | chan | $1 |
| BIT_INFO | 2 | value | 0x0,0x990 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 2 | value | 0,16-2448 |
| HALF_LOCKED2 | &desc->request_mutex | ||
| HALF_LOCKED2 | flags |
drivers/dma/xilinx/xilinx_dma.c xilinx_dma_prep_dma_cyclic() -> dma_ctrl_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->direction | 1-3 |
| PARAM_VALUE | 0 | chan->lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | chan->xdev | 4096-ptr_max |
| PARAM_VALUE | 1 | reg | 0 |
| PARAM_COMPARE | 0 | &chan->free_seg_list | != $0->free_seg_list.next |
| BIT_INFO | 2 | value | 0x10,0xffffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 2 | value | 0-u32max |
| HALF_LOCKED2 | &sdr->v4l2_mutex | ||
| HALF_LOCKED2 | &sport->port.lock | ||
| HALF_LOCKED2 | _T->lock | ||
| HALF_LOCKED2 | flags |
drivers/dma/xilinx/xilinx_dma.c xilinx_dma_start_transfer() -> dma_ctrl_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->err | 0 |
| PARAM_VALUE | 0 | chan->xdev | 4096-ptr_max |
| PARAM_VALUE | 1 | reg | 0 |
| CAPPED_DATA | 0 | &chan->active_list | 1 |
| CAPPED_DATA | 0 | &chan->pending_list | 1 |
| DATA_SOURCE | 0 | chan | $0 |
| PARAM_COMPARE | 0 | &chan->pending_list | != $0->pending_list.next |
| BIT_INFO | 2 | value | 0x7000,0xffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 2 | value | 0-u32max[c] |
| LOCK2 | 0 | &chan->lock | |
| HALF_LOCKED2 | flags | ||
| TYPE_LOCK | (struct xilinx_dma_chan)->lock |
drivers/dma/xilinx/xilinx_dma.c xilinx_dma_start_transfer() -> dma_ctrl_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->err | 0 |
| PARAM_VALUE | 0 | chan->has_sg | 0 |
| PARAM_VALUE | 0 | chan->idle | 1 |
| PARAM_VALUE | 0 | chan->xdev | 4096-ptr_max |
| PARAM_VALUE | 1 | reg | 40 |
| CAPPED_DATA | 0 | &chan->active_list | 1 |
| CAPPED_DATA | 0 | &chan->pending_list | 1 |
| CAPPED_DATA | 2 | value | 1 |
| DATA_SOURCE | 0 | chan | $0 |
| PARAM_COMPARE | 0 | &chan->pending_list | != $0->pending_list.next |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | 0 | &chan->lock | |
| HALF_LOCKED2 | flags | ||
| TYPE_LOCK | (struct xilinx_dma_chan)->lock |
drivers/dma/xilinx/xilinx_dma.c xilinx_dma_terminate_all() -> dma_ctrl_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->cyclic | 1 |
| PARAM_VALUE | 0 | chan->idle | 1 |
| PARAM_VALUE | 0 | chan->lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | chan->terminating | 1 |
| PARAM_VALUE | 0 | chan->xdev | 4096-ptr_max |
| PARAM_VALUE | 1 | reg | 0 |
| PARAM_VALUE | 2 | value | 0-4294967279 |
| BIT_INFO | 2 | value | 0x0,0xffffffef |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 2 | value | 0-4294967279[c] |
| HALF_LOCKED2 | &controller->io_mutex | ||
| HALF_LOCKED2 | &ctlr->io_mutex | ||
| HALF_LOCKED2 | &dma->lock | ||
| HALF_LOCKED2 | &dmm->wa_lock | ||
| HALF_LOCKED2 | &epf_mhi->lock | ||
| HALF_LOCKED2 | &host->io_mutex | ||
| HALF_LOCKED2 | &host->lock | ||
| HALF_LOCKED2 | &host->thread_lock | ||
| HALF_LOCKED2 | &mem->spi->controller->bus_lock_mutex | ||
| HALF_LOCKED2 | &mem->spi->controller->io_mutex | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &ospi->lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &priv->lock | ||
| HALF_LOCKED2 | &qspi->list_lock | ||
| HALF_LOCKED2 | &qspi->lock | ||
| HALF_LOCKED2 | &sdr->v4l2_mutex | ||
| HALF_LOCKED2 | &sp->mutex | ||
| HALF_LOCKED2 | &spi->io_mutex | ||
| HALF_LOCKED2 | &spi->mutex_lock | ||
| HALF_LOCKED2 | &state->uart_port->lock | ||
| HALF_LOCKED2 | _T->lock | ||
| HALF_LOCKED2 | flags |
drivers/dma/xilinx/xilinx_dma.c xilinx_mcdma_irq_handler() -> dma_ctrl_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->xdev | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->xdev->chan | 4096-ptr_max |
| PARAM_VALUE | 2 | value | 0,32-224 |
| BIT_INFO | 2 | value | 0x0,0xe0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 2 | value | 0,32-224 |
| HALF_LOCKED2 | &desc->request_mutex | ||
| HALF_LOCKED2 | flags |
drivers/dma/xilinx/xilinx_dma.c xilinx_mcdma_start_transfer() -> dma_ctrl_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->err | 0 |
| PARAM_VALUE | 0 | chan->xdev | 4096-ptr_max |
| CAPPED_DATA | 0 | &chan->pending_list | 1 |
| DATA_SOURCE | 0 | chan | $0 |
| PARAM_COMPARE | 0 | &chan->pending_list | != $0->pending_list.next |
| BIT_INFO | 2 | value | 0xe0,0xffffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 2 | value | 0-u32max |
| LOCK2 | 0 | &chan->lock | |
| HALF_LOCKED2 | flags | ||
| TYPE_LOCK | (struct xilinx_dma_chan)->lock |
drivers/dma/xilinx/xilinx_dma.c xilinx_mcdma_start_transfer() -> dma_ctrl_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->err | 0 |
| PARAM_VALUE | 0 | chan->xdev | 4096-ptr_max |
| PARAM_VALUE | 1 | reg | 8 |
| CAPPED_DATA | 0 | &chan->active_list | 1 |
| CAPPED_DATA | 0 | &chan->pending_list | 1 |
| DATA_SOURCE | 0 | chan | $0 |
| PARAM_COMPARE | 0 | &chan->pending_list | != $0->pending_list.next |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 2 | value | 0-u32max |
| LOCK2 | 0 | &chan->lock | |
| HALF_LOCKED2 | flags | ||
| TYPE_LOCK | (struct xilinx_dma_chan)->lock |
drivers/dma/xilinx/xilinx_dma.c xilinx_mcdma_start_transfer() -> dma_ctrl_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->err | 0 |
| PARAM_VALUE | 0 | chan->xdev | 4096-ptr_max |
| CAPPED_DATA | 0 | &chan->active_list | 1 |
| CAPPED_DATA | 0 | &chan->pending_list | 1 |
| DATA_SOURCE | 0 | chan | $0 |
| PARAM_COMPARE | 0 | &chan->pending_list | != $0->pending_list.next |
| BIT_INFO | 2 | value | 0x1,0xffffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 2 | value | 0-u32max |
| LOCK2 | 0 | &chan->lock | |
| HALF_LOCKED2 | flags | ||
| TYPE_LOCK | (struct xilinx_dma_chan)->lock |
drivers/dma/xilinx/xilinx_dma.c xilinx_vdma_channel_set_config() -> dma_ctrl_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->xdev | 4096-ptr_max |
| PARAM_VALUE | 1 | reg | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 2 | value | 0-u32max[c] |
drivers/dma/xilinx/xilinx_dma.c xilinx_vdma_start_transfer() -> dma_ctrl_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->err | 0 |
| PARAM_VALUE | 0 | chan->idle | 1 |
| PARAM_VALUE | 0 | chan->xdev | 4096-ptr_max |
| PARAM_VALUE | 1 | reg | 0 |
| CAPPED_DATA | 0 | &chan->pending_list | 1 |
| DATA_SOURCE | 0 | chan | $0 |
| PARAM_COMPARE | 0 | &chan->pending_list | != $0->pending_list.next |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 2 | value | 0-u32max |
| LOCK2 | 0 | &chan->lock | |
| HALF_LOCKED2 | flags | ||
| TYPE_LOCK | (struct xilinx_dma_chan)->lock |
drivers/dma/xilinx/xilinx_dma.c xilinx_write() -> dma_ctrl_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->err | 0 |
| PARAM_VALUE | 0 | chan->ext_addr | 0 |
| PARAM_VALUE | 0 | chan->xdev | 4096-ptr_max |
| DATA_SOURCE | 0 | chan | $0 |
| DATA_SOURCE | 1 | reg | $1 |
| DATA_SOURCE | 2 | value | $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | 0 | &chan->lock | |
| HALF_LOCKED2 | flags | ||
| TYPE_LOCK | (struct xilinx_dma_chan)->lock |
drivers/gpu/drm/i915/gvt/cmd_parser.c cmd_reg_handler() -> (struct intel_gvt_mmio_info)->write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->gvt | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->gvt->irq.irq_map->down_irq_bitmask | 0-4294967295 |
| PARAM_VALUE | 0 | chan->gvt->irq.irq_map->down_irq_group | s32min-s32max |
| PARAM_VALUE | 0 | chan->gvt->irq.irq_map->up_irq_bit | s32min-s32max |
| PARAM_VALUE | 0 | chan->gvt->irq.irq_map->up_irq_group | s32min-s32max |
| PARAM_VALUE | 0 | chan->mmio.vreg | 4096-ptr_max |
| PARAM_VALUE | 0 | *chan->hws_pga | 0-4294967295 |
| PARAM_VALUE | 1 | reg | 0,4-8388604 |
| PARAM_VALUE | 2 | value | 5129937768527126528 |
| PARAM_VALUE | 3 | bytes | 4 |
| BUF_SIZE | 2 | value | 4 |
| CAPPED_DATA | 1 | reg | 1 |
| DATA_SOURCE | 1 | reg | $1 |
| BIT_INFO | 1 | reg | 0x0,0x7ffffc |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| USER_DATA | 0 | chan->display.i2c_edid.current_edid_read | 0-255[c] |
| USER_DATA | 0 | chan->display.i2c_edid.gmbus.cycle_type | 0-7[c] |
| USER_DATA | 0 | chan->display.i2c_edid.gmbus.total_byte_count | 0-511[c] |
| HALF_LOCKED2 | &gvt->lock | ||
| HALF_LOCKED2 | &vgpu->vgpu_lock |
drivers/gpu/drm/i915/gvt/handlers.c intel_vgpu_mmio_reg_rw() -> (struct intel_gvt_mmio_info)->write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->failsafe | 0 |
| PARAM_VALUE | 0 | chan->gtt.ggtt_mm->ppgtt_mm.root_entry_type | 0,11-12 |
| PARAM_VALUE | 0 | chan->gtt.ggtt_mm->vgpu->gvt->gt->i915->drm.dev->iommu_group->default_domain | 0-s64max |
| PARAM_VALUE | 0 | chan->gvt | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->gvt->device_info.mmio_size | 1-u32max |
| PARAM_VALUE | 0 | chan->gvt->gt | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->gvt->gt->ggtt | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->gvt->gt->i915->drm.dev->dma_io_tlb_mem->can_grow | 0-1 |
| PARAM_VALUE | 0 | chan->gvt->gt->uncore->rpm->kdev->power.wakeirq->status | 0-4294967295 |
| PARAM_VALUE | 0 | chan->gvt->irq.irq_map->down_irq_bitmask | 0-4294967295 |
| PARAM_VALUE | 0 | chan->gvt->irq.irq_map->down_irq_group | s32min-s32max |
| PARAM_VALUE | 0 | chan->gvt->irq.irq_map->up_irq_bit | s32min-s32max |
| PARAM_VALUE | 0 | chan->gvt->irq.irq_map->up_irq_group | s32min-s32max |
| PARAM_VALUE | 0 | chan->gvt->mmio.mmio_attribute | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->vgpu_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | chan->vgpu_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | chan->vgpu_lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | chan->vgpu_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | chan->vgpu_lock.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | chan->vgpu_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | chan->vgpu_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | *chan->hws_pga | 0-4294967295 |
| PARAM_VALUE | 1 | reg | 0-4294967294 |
| PARAM_VALUE | 2 | value | 3409945690100224000,7385378861487415296 |
| PARAM_VALUE | 3 | bytes | 1-2,4,8 |
| BUF_SIZE | 2 | value | (-1),2,4,8 |
| BUF_SIZE | 2 | value | (-1),2,4,8 |
| CAPPED_DATA | 1 | reg | 1 |
| DATA_SOURCE | 0 | chan | $0 |
| DATA_SOURCE | 1 | reg | $1 |
| DATA_SOURCE | 2 | value | $2 |
| DATA_SOURCE | 3 | bytes | $3 |
| BIT_INFO | 1 | reg | 0x0,0x7fffffff |
| HOST_DATA | 0 | chan->gvt->gt->uncore->fifo_count | 0-127,u32max |
| USER_PTR | 2 | value | |
| LOCK2 | 0 | &chan->vgpu_lock | |
| TYPE_LOCK | (struct intel_vgpu)->vgpu_lock |
drivers/gpu/drm/i915/gvt/handlers.c intel_vgpu_mmio_reg_rw() -> (struct intel_gvt_mmio_info)->write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | chan | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->failsafe | 0 |
| PARAM_VALUE | 0 | chan->gtt.ggtt_mm->ppgtt_mm.root_entry_type | 0,11-12 |
| PARAM_VALUE | 0 | chan->gtt.ggtt_mm->vgpu->gvt->gt->i915->drm.dev->iommu_group->default_domain | 0-s64max |
| PARAM_VALUE | 0 | chan->gvt | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->gvt->device_info.mmio_size | 1-u32max |
| PARAM_VALUE | 0 | chan->gvt->gt | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->gvt->gt->ggtt | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->gvt->gt->i915->drm.dev->dma_io_tlb_mem->can_grow | 0-1 |
| PARAM_VALUE | 0 | chan->gvt->gt->uncore->rpm->kdev->power.wakeirq->status | 0-4294967295 |
| PARAM_VALUE | 0 | chan->gvt->irq.irq_map->down_irq_bitmask | 0-4294967295 |
| PARAM_VALUE | 0 | chan->gvt->irq.irq_map->down_irq_group | s32min-s32max |
| PARAM_VALUE | 0 | chan->gvt->irq.irq_map->up_irq_bit | s32min-s32max |
| PARAM_VALUE | 0 | chan->gvt->irq.irq_map->up_irq_group | s32min-s32max |
| PARAM_VALUE | 0 | chan->gvt->mmio.mmio_attribute | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->mmio.vreg | 4096-ptr_max |
| PARAM_VALUE | 0 | chan->vgpu_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | chan->vgpu_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | chan->vgpu_lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | chan->vgpu_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | chan->vgpu_lock.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | chan->vgpu_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | chan->vgpu_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | *chan->hws_pga | 0-4294967295 |
| PARAM_VALUE | 1 | reg | 0-4294967294 |
| PARAM_VALUE | 2 | value | 7768291379107352576 |
| PARAM_VALUE | 3 | bytes | 1-2,4,8 |
| BUF_SIZE | 2 | value | 8 |
| CAPPED_DATA | 1 | reg | 1 |
| DATA_SOURCE | 0 | chan | $0 |
| DATA_SOURCE | 1 | reg | $1 |
| DATA_SOURCE | 3 | bytes | $3 |
| BIT_INFO | 1 | reg | 0x0,0x7fffffff |
| HOST_DATA | 0 | chan->gvt->gt->uncore->fifo_count | 0-127,u32max |
| LOCK2 | 0 | &chan->vgpu_lock | |
| TYPE_LOCK | (struct intel_vgpu)->vgpu_lock |