dml2_map_dc_pipes identifier - Linux source code next-20260811

Projects

linux

Versions

FIXME
- FIXME
  - next-20260811

Defined in 1 files as a prototype:

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.h, line 50 (as a prototype)

Defined in 1 files as a function:

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c, line 1050 (as a function)

Referenced in 3 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/../display/dc/dml2_0/dml21/dml21_utils.c dml21_handle_phantom_streams_planes() -> dml2_map_dc_pipes()

Type	Parameter	Key	Value
PARAM_VALUE	0	ctx	4096-ptr_max
PARAM_VALUE	0	ctx->architecture	1
PARAM_VALUE	0	ctx->config.callbacks.get_otg_master_for_stream	4096-ptr_max
PARAM_VALUE	0	ctx->config.skip_hw_state_mapping	0
PARAM_VALUE	0	ctx->config.svp_pstate.callbacks.create_phantom_plane	4096-ptr_max
PARAM_VALUE	0	ctx->config.svp_pstate.callbacks.create_phantom_stream	4096-ptr_max
PARAM_VALUE	0	ctx->v21.display_config.gpuvm_max_page_table_levels	1-u32max
PARAM_VALUE	0	ctx->v21.display_config.minimize_det_reallocation	1
PARAM_VALUE	0	ctx->v21.display_config.num_planes	1-s32max
PARAM_VALUE	0	ctx->v21.display_config.num_streams	1-s32max
PARAM_VALUE	0	ctx->v21.display_config.overrides.all_streams_blanked	1
PARAM_VALUE	0	ctx->v21.display_config.overrides.enable_subvp_implicit_pmo	1
PARAM_VALUE	0	ctx->v21.display_config.overrides.hw.force_unbounded_requesting.enable	1
PARAM_VALUE	0	ctx->v21.mode_programming.dml2_instance	4096-ptr_max
PARAM_VALUE	0	ctx->v21.mode_programming.dml2_instance->funcs.build_mode_programming	0,7150732188596219904
PARAM_VALUE	0	ctx->v21.mode_programming.programming	4096-ptr_max
PARAM_VALUE	0	ctx->v21.mode_programming.programming->display_config.num_planes	1-u32max
PARAM_VALUE	0	ctx->v21.mode_programming.programming->display_config.num_streams	1-u32max
PARAM_VALUE	0	ctx->v21.mode_programming.programming->plane_programming	4096-ptr_max
PARAM_VALUE	0	ctx->v21.mode_programming.programming->stream_programming	4096-ptr_max
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_dlg_sys_param.deepsleep_dcfclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_dlg_sys_param.mem_trip_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_dlg_sys_param.t_extra_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_dlg_sys_param.t_mclk_wm_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_dlg_sys_param.t_sr_wm_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_dlg_sys_param.t_urg_wm_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_dlg_sys_param.total_flip_bw	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.clks_cfg.dcfclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.clks_cfg.dispclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.clks_cfg.dppclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.clks_cfg.refclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.clks_cfg.socclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.dout.output_bpp	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.dout.wb.wb_hratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.dout.wb.wb_vratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.dest.pixel_rate_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.scale_ratio_depth.hscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.scale_ratio_depth.hscl_ratio_c	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.scale_ratio_depth.vinit	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.scale_ratio_depth.vinit_bot	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.scale_ratio_depth.vinit_bot_c	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.scale_ratio_depth.vinit_c	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.scale_ratio_depth.vscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.scale_ratio_depth.vscl_ratio_c	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.src.dcc_fraction_of_zs_req_chroma	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.src.dcc_fraction_of_zs_req_luma	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.pipe_dlg_param.pixel_rate_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	*ctx->v21.dml_to_dc_pipe_mapping.disp_cfg_to_plane_id_valid	1
PARAM_VALUE	0	*ctx->v21.dml_to_dc_pipe_mapping.disp_cfg_to_stream_id	0-4294967295
PARAM_VALUE	0	*ctx->v21.dml_to_dc_pipe_mapping.disp_cfg_to_stream_id_valid	1
PARAM_VALUE	0	*ctx->v21.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id	0-4294967295
PARAM_VALUE	0	*ctx->v21.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id_valid	1
PARAM_VALUE	0	*ctx->v21.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id	0-4294967295
PARAM_VALUE	0	*ctx->v21.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id_valid	1
PARAM_VALUE	1	state	4096-ptr_max
PARAM_VALUE	1	*state->res_ctx.is_dsc_acquired	0-1
PARAM_VALUE	2	disp_cfg	0
PARAM_VALUE	3	mapping	4096-ptr_max
CAPPED_DATA	0	ctx->v21.mode_programming.programming->display_config.num_planes	1
CAPPED_DATA	0	ctx->v21.mode_programming.programming->display_config.num_streams	1
DATA_SOURCE	0	ctx	$2
DATA_SOURCE	1	state	$1
FUZZY_MAX	0	ctx->v21.mode_programming.programming->display_config.num_planes	1
MEM_ZERO	0	&ctx->v21.display_config
MEM_ZERO	0	&ctx->v21.dml_to_dc_pipe_mapping
MEM_ZERO	3	mapping
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/dml2_0/dml21/dml21_wrapper_fpu.c dml21_mode_check_and_programming() -> dml2_map_dc_pipes()

Type	Parameter	Key	Value
PARAM_VALUE	0	ctx	4096-ptr_max
PARAM_VALUE	0	ctx->architecture	1
PARAM_VALUE	0	ctx->config.skip_hw_state_mapping	0
PARAM_VALUE	0	ctx->v21.display_config.gpuvm_max_page_table_levels	1-u32max
PARAM_VALUE	0	ctx->v21.display_config.minimize_det_reallocation	1
PARAM_VALUE	0	ctx->v21.display_config.num_planes	1-s32max
PARAM_VALUE	0	ctx->v21.display_config.num_streams	1-s32max
PARAM_VALUE	0	ctx->v21.display_config.overrides.all_streams_blanked	1
PARAM_VALUE	0	ctx->v21.display_config.overrides.enable_subvp_implicit_pmo	1
PARAM_VALUE	0	ctx->v21.display_config.overrides.hw.force_unbounded_requesting.enable	1
PARAM_VALUE	0	ctx->v21.mode_programming.dml2_instance	4096-ptr_max
PARAM_VALUE	0	ctx->v21.mode_programming.dml2_instance->funcs.build_mode_programming	0,7150732188596219904
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_dlg_sys_param.deepsleep_dcfclk_mhz	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_dlg_sys_param.mem_trip_us	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_dlg_sys_param.t_extra_us	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_dlg_sys_param.t_mclk_wm_us	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_dlg_sys_param.t_sr_wm_us	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_dlg_sys_param.t_urg_wm_us	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_dlg_sys_param.total_flip_bw	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_input.clks_cfg.dcfclk_mhz	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_input.clks_cfg.dispclk_mhz	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_input.clks_cfg.dppclk_mhz	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_input.clks_cfg.refclk_mhz	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_input.clks_cfg.socclk_mhz	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_input.dout.output_bpp	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_input.dout.wb.wb_hratio	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_input.dout.wb.wb_vratio	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_input.pipe.dest.pixel_rate_mhz	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_input.pipe.scale_ratio_depth.vinit	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->dml_input.pipe.scale_ratio_depth.vinit_c	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.bottom_pipe->pipe_dlg_param.pixel_rate_mhz	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_dlg_sys_param.deepsleep_dcfclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_dlg_sys_param.mem_trip_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_dlg_sys_param.t_extra_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_dlg_sys_param.t_mclk_wm_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_dlg_sys_param.t_sr_wm_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_dlg_sys_param.t_urg_wm_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_dlg_sys_param.total_flip_bw	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.clks_cfg.dcfclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.clks_cfg.dispclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.clks_cfg.dppclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.clks_cfg.refclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.clks_cfg.socclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.dout.output_bpp	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.dout.wb.wb_hratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.dout.wb.wb_vratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.dest.pixel_rate_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.scale_ratio_depth.hscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.scale_ratio_depth.hscl_ratio_c	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.scale_ratio_depth.vinit	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.scale_ratio_depth.vinit_bot	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.scale_ratio_depth.vinit_bot_c	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.scale_ratio_depth.vinit_c	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.scale_ratio_depth.vscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.scale_ratio_depth.vscl_ratio_c	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.src.dcc_fraction_of_zs_req_chroma	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.dml_input.pipe.src.dcc_fraction_of_zs_req_luma	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.pipe_dlg_param.pixel_rate_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.plane_res.spl_in.basic_in.format	0-9
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.plane_res.spl_in.basic_in.mpc_h_slice_index	0-s32max
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.plane_res.spl_in.debug.visual_confirm_base_offset	0-10
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.plane_res.spl_in.odm_slice_index	0-s32max
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.plane_res.spl_out.dscl_prog_data->dscl_mode	1,3
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.plane_res.spl_out.dscl_prog_data->isharp_fmt.mode	0-1
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.plane_res.spl_out.dscl_prog_data->isharp_fmt.norm	15360
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.plane_res.spl_out.dscl_prog_data->ratios.h_scale_ratio	0,32-134217696
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.plane_res.spl_out.dscl_prog_data->ratios.v_scale_ratio	0,32-134217696
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_dlg_sys_param.deepsleep_dcfclk_mhz	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_dlg_sys_param.mem_trip_us	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_dlg_sys_param.t_extra_us	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_dlg_sys_param.t_mclk_wm_us	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_dlg_sys_param.t_sr_wm_us	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_dlg_sys_param.t_urg_wm_us	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_dlg_sys_param.total_flip_bw	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_input.clks_cfg.dcfclk_mhz	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_input.clks_cfg.dispclk_mhz	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_input.clks_cfg.dppclk_mhz	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_input.clks_cfg.refclk_mhz	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_input.clks_cfg.socclk_mhz	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_input.dout.output_bpp	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_input.dout.wb.wb_hratio	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_input.dout.wb.wb_vratio	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_input.pipe.dest.pixel_rate_mhz	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_input.pipe.scale_ratio_depth.hscl_ratio	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_input.pipe.scale_ratio_depth.vinit	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_input.pipe.scale_ratio_depth.vinit_bot	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_input.pipe.scale_ratio_depth.vinit_bot_c	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_input.pipe.scale_ratio_depth.vinit_c	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->dml_input.pipe.scale_ratio_depth.vscl_ratio	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	ctx->v21.scratch.temp_pipe.top_pipe->pipe_dlg_param.pixel_rate_mhz	-1.797693e+308-1.797693e+308
PARAM_VALUE	0	*ctx->v21.dml_to_dc_pipe_mapping.disp_cfg_to_plane_id_valid	1
PARAM_VALUE	0	*ctx->v21.dml_to_dc_pipe_mapping.disp_cfg_to_stream_id	0-4294967295
PARAM_VALUE	0	*ctx->v21.dml_to_dc_pipe_mapping.disp_cfg_to_stream_id_valid	1
PARAM_VALUE	0	*ctx->v21.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id	0-4294967295
PARAM_VALUE	0	*ctx->v21.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id_valid	1
PARAM_VALUE	0	*ctx->v21.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id	0-4294967295
PARAM_VALUE	0	*ctx->v21.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id_valid	1
PARAM_VALUE	0	*ctx->v21.scratch.temp_pipe->plane_res.spl_out->dscl_prog_data->isharp_delta	0-4294967295
PARAM_VALUE	1	state	4096-ptr_max
PARAM_VALUE	1	state->phantom_plane_count	1-255
PARAM_VALUE	1	state->phantom_stream_count	1-255
PARAM_VALUE	1	state->stream_count	1-255
PARAM_VALUE	1	*state->res_ctx.is_dsc_acquired	0-1
PARAM_VALUE	2	disp_cfg	0
PARAM_VALUE	3	mapping	4096-ptr_max
CAPPED_DATA	1	state->stream_count	1
DATA_SOURCE	0	ctx	$2
DATA_SOURCE	1	state	$1
MEM_ZERO	0	&ctx->v21.display_config
MEM_ZERO	0	&ctx->v21.dml_to_dc_pipe_mapping
MEM_ZERO	3	mapping
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/dml2_0/dml2_wrapper_fpu.c dml2_validate_and_build_resource() -> dml2_map_dc_pipes()

Type	Parameter	Key	Value
PARAM_VALUE	0	ctx	4096-ptr_max
PARAM_VALUE	0	ctx->config.skip_hw_state_mapping	0
PARAM_VALUE	0	ctx->v20.scratch.dummy_pstate_table	4096-ptr_max
PARAM_VALUE	0	*ctx->det_helper_scratch.dpps_per_surface	1
PARAM_VALUE	1	state	4096-ptr_max
PARAM_VALUE	1	state->bw_ctx.dml.ip.dcfclk_cstate_latency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.dispclk_ramp_margin_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.dsc_delay_factor_wa	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.max_hscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.max_vscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.min_prefetch_in_strobe_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.underscan_factor	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.writeback_max_hscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.writeback_max_vscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.writeback_min_hscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.writeback_min_vscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.xfc_fill_bw_overhead_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dcn_downspread_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dfs_vco_period_ps	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dispclk_dppclk_vco_speed_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.downspread_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dram_channel_width_bytes	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dram_clock_change_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dram_page_open_time_ns	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dram_return_buffer_per_channel_bytes	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dram_rw_turnaround_time_ns	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dummy_pstate_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.fabric_datapath_to_dcn_data_return_bytes	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.fclk_change_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.ideal_dram_bw_after_urgent_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.mall_allocated_for_dcn_mbytes	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.max_avg_dram_bw_use_normal_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.max_avg_dram_bw_use_normal_strobe_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.max_avg_fabric_bw_use_normal_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.max_avg_sdp_bw_use_normal_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.max_vratio_pre	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.min_dcfclk	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.pct_ideal_dram_bw_after_urgent_strobe	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.pct_ideal_fabric_bw_after_urgent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.pct_ideal_sdp_bw_after_urgent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.smn_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.sr_enter_plus_exit_z8_time_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.sr_exit_time_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.sr_exit_z8_time_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.urgent_latency_adjustment_fabric_clock_component_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.urgent_latency_adjustment_fabric_clock_reference_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.urgent_latency_pixel_data_only_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.urgent_latency_pixel_mixed_with_vm_data_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.urgent_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.urgent_latency_vm_data_only_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.usr_retraining_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.writeback_dram_clock_change_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.writeback_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.xfc_bus_transport_time_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.xfc_xbuf_latency_tolerance_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.AverageDCCCompressionRate	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.AverageReadBandwidth	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.BPP	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.BandwidthAvailableForImmediateFlip	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.CriticalPoint	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.CursorBufferSize	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.CursorChunkSize	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DCFCLK	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DCFCLKDeepSleep	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DETBufferSizeInTime	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLK	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLKDelaySubtotal	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLKRampingMargin	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLKWithRamping	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLKWithRampingRoundedToDFSGranularity	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLKWithoutRamping	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLK_calculated	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DPPCLKDelayCNVCCursor	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DPPCLKDelayCNVCFormater	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DPPCLKDelaySCL	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DPPCLKDelaySCLLBOnly	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DPPCLKDelaySubtotal	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DRAMChannelWidth	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DRAMClockChangeLatency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DRAMClockChangeLatencyOverride	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DRAMClockChangeWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DRAMSpeed	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.Downspreading	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.EffectiveDETLBLinesChroma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.EffectiveDETLBLinesLuma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.EffectiveDETPlusLBLinesChroma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.EffectiveDETPlusLBLinesLuma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.EffectiveFECOverhead	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.ExtraLatency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FCLKChangeLatency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FECOverhead	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FabricAndDRAMBandwidth	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FabricClock	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FinalFillLevel	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FinalFillMargin	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FractionOfUrgentBandwidth	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FractionOfUrgentBandwidthImmediateFlip	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.GPUVMMinPageSize	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.GlobalDPPCLK	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.HostVMMinPageSize	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.InitFillLevel	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.LastPixelOfLineExtraWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.LinesInDETChroma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.LinesInDETLuma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.LinesToFinishSwathTransferStutterCriticalPlane	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxDCHUBToPSCLThroughput	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxDispclkRoundedDownToDFSGranularity	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxDppclkRoundedDownToDFSGranularity	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxHSCLRatio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxPSCLToLBThroughput	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxTotalVActiveRDBandwidth	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxVRatioPre	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxVSCLRatio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxVStartup	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaximumReadBandwidthWithPrefetch	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaximumReadBandwidthWithoutPrefetch	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaximumSwathWidthInDETBuffer	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaximumSwathWidthInLineBuffer	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaximumSwathWidthInLineBufferChroma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaximumSwathWidthInLineBufferLuma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaximumSwathWidthSupport	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MinActiveDRAMClockChangeLatencySupported	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MinActiveDRAMClockChangeMargin	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MinFullDETBufferingTime	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MinPixelChunkSizeBytes	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MinUrgentLatencySupportUs	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.NextMaxVStartup	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.NonUrgentLatencyTolerance	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.NumberOfChannels	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.Outbpp	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PDEAndMetaPTEBytesPerFrameC	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PDEAndMetaPTEBytesPerFrameY	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PTEGroupSize	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PartOfBurstThatFitsInROB	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PlaneRequiredDISPCLK	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PlaneRequiredDISPCLKWithODMCombine	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PlaneRequiredDISPCLKWithODMCombine2To1	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PlaneRequiredDISPCLKWithODMCombine4To1	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PlaneRequiredDISPCLKWithoutODMCombine	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.RemainingFillLevel	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.ReturnBW	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.ReturnBWToDCNPerState	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.ReturnBandwidthToDCN	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.ReturnBusWidth	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.RoundTripPingLatencyCycles	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.RoundedUpMaxSwathSizeBytesC	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.RoundedUpMaxSwathSizeBytesY	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SMNLatency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SOCCLK	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SREnterPlusExitTime	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SREnterPlusExitZ8Time	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SRExitTime	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SRExitZ8Time	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SmallestVBlank	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SrcActiveDrainRate	-9.223372e+18-9.223372e+18
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PARAM_VALUE	1	state->dcn_bw_vars.pte_chunk_size	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.ptemeta_urgent_watermark	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.read256_bytes_block_height_c	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.read256_bytes_block_height_y	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.read256_bytes_block_width_c	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.read256_bytes_block_width_y	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.required_output_bw	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.required_prefetch_pix_data_bw	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.return_bandwidth_to_dcn	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.return_bus_width	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.return_bw	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.return_bw_todcn_per_state	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.rob_buffer_size_in_kbyte	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.round_trip_ping_latency_cycles	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.rounded_up_max_swath_size_bytes_c	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.rounded_up_max_swath_size_bytes_y	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.second_min_active_dram_clock_change_margin	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.smallest_vblank	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.socclk	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.sr_enter_plus_exit_time	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.sr_exit_time	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.stutter_burst_time	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.stutter_efficiency	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.stutter_efficiency_not_including_vblank	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.stutter_enter_plus_exit_watermark	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.stutter_exit_watermark	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.swath_width	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.swath_width_granularity_c	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.swath_width_granularity_y	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.t_calc	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.t_setup	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.t_wait	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.time_calc	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.time_for_fetching_meta_pte	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.time_for_fetching_row_in_vblank	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.time_for_meta_and_dpte_row_with_immediate_flip	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.time_for_meta_and_dpte_row_without_immediate_flip	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.time_for_meta_pte_with_immediate_flip	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.time_for_meta_pte_without_immediate_flip	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.time_setup	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.tot_immediate_flip_bytes	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.total_active_dpp	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.total_active_writeback	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.total_bandwidth_consumed_gbyte_per_second	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.total_data_read_bandwidth	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.total_dcc_active_dpp	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.total_number_of_active_writeback	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.total_read_bandwidth_consumed_gbyte_per_second	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.total_repeater_delay	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.total_repeater_delay_time	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.total_write_bandwidth_consumed_gbyte_per_second	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.under_scan_factor	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.urgent_extra_latency	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.urgent_latency	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.urgent_latency_support_us_chroma	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.urgent_latency_support_us_luma	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.urgent_out_of_order_return_per_channel	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.urgent_round_trip_and_out_of_order_latency	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.urgent_watermark	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.v_blank_of_min_active_dram_clock_change_margin	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.v_blank_time	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.v_init_c	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.v_init_y	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.v_startup_lines	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.vmm_page_size	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.voltage_level_with_immediate_flip	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.voltage_level_without_immediate_flip	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.wr_bandwidth	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.write_back_latency	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.writeback_chroma_buffer_size	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.writeback_chunk_size	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.writeback_dram_clock_change_latency_margin	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.writeback_dram_clock_change_watermark	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.writeback_luma_buffer_size	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_dlg_sys_param.deepsleep_dcfclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_dlg_sys_param.mem_trip_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_dlg_sys_param.t_extra_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_dlg_sys_param.t_mclk_wm_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_dlg_sys_param.t_sr_wm_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_dlg_sys_param.t_urg_wm_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_dlg_sys_param.total_flip_bw	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.clks_cfg.dcfclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.clks_cfg.dispclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.clks_cfg.dppclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.clks_cfg.refclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.clks_cfg.socclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.dout.output_bpp	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.dout.wb.wb_hratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.dout.wb.wb_vratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.dest.pixel_rate_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.scale_ratio_depth.hscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.scale_ratio_depth.hscl_ratio_c	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.scale_ratio_depth.vinit	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.scale_ratio_depth.vinit_bot	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.scale_ratio_depth.vinit_bot_c	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.scale_ratio_depth.vinit_c	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.scale_ratio_depth.vscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.scale_ratio_depth.vscl_ratio_c	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.src.dcc_fraction_of_zs_req_chroma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.src.dcc_fraction_of_zs_req_luma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.src.xfc_params.xfc_tslv_vready_offset_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.src.xfc_params.xfc_tslv_vupdate_offset_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.src.xfc_params.xfc_tslv_vupdate_width_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.pipe_dlg_param.pixel_rate_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	*state->bw_ctx.dml2->det_helper_scratch.dpps_per_surface	1
PARAM_VALUE	2	disp_cfg	4096-ptr_max
PARAM_VALUE	3	mapping	4096-ptr_max
DATA_SOURCE	1	state	$1
MEM_ZERO	0	&ctx->v20.dml_core_ctx.mp
MEM_ZERO	0	&ctx->v20.dml_core_ctx.ms
MEM_ZERO	0	&ctx->v20.dml_core_ctx.policy
MEM_ZERO	0	&ctx->v20.scratch
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/dml2_0/dml2_wrapper_fpu.c dml2_validate_and_build_resource() -> dml2_map_dc_pipes()

Type	Parameter	Key	Value
PARAM_VALUE	0	ctx	4096-ptr_max
PARAM_VALUE	0	ctx->config.skip_hw_state_mapping	0
PARAM_VALUE	0	ctx->det_helper_scratch->dpps_per_surface	s32min-s32max
PARAM_VALUE	0	ctx->v20.scratch.dummy_pstate_table	4096-ptr_max
PARAM_VALUE	1	state	4096-ptr_max
PARAM_VALUE	1	state->bw_ctx.dml.ip.dcfclk_cstate_latency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.dispclk_ramp_margin_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.dsc_delay_factor_wa	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.max_hscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.max_vscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.min_prefetch_in_strobe_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.underscan_factor	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.writeback_max_hscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.writeback_max_vscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.writeback_min_hscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.writeback_min_vscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.ip.xfc_fill_bw_overhead_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dcn_downspread_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dfs_vco_period_ps	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dispclk_dppclk_vco_speed_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.downspread_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dram_channel_width_bytes	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dram_clock_change_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dram_page_open_time_ns	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dram_return_buffer_per_channel_bytes	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dram_rw_turnaround_time_ns	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.dummy_pstate_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.fabric_datapath_to_dcn_data_return_bytes	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.fclk_change_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.ideal_dram_bw_after_urgent_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.mall_allocated_for_dcn_mbytes	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.max_avg_dram_bw_use_normal_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.max_avg_dram_bw_use_normal_strobe_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.max_avg_fabric_bw_use_normal_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.max_avg_sdp_bw_use_normal_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.max_vratio_pre	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.min_dcfclk	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.pct_ideal_dram_bw_after_urgent_strobe	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.pct_ideal_fabric_bw_after_urgent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.pct_ideal_sdp_bw_after_urgent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.smn_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.sr_enter_plus_exit_z8_time_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.sr_exit_time_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.sr_exit_z8_time_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.urgent_latency_adjustment_fabric_clock_component_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.urgent_latency_adjustment_fabric_clock_reference_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.urgent_latency_pixel_data_only_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.urgent_latency_pixel_mixed_with_vm_data_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.urgent_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.urgent_latency_vm_data_only_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.usr_retraining_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.writeback_dram_clock_change_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.writeback_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.xfc_bus_transport_time_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.soc.xfc_xbuf_latency_tolerance_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.AverageDCCCompressionRate	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.AverageReadBandwidth	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.BPP	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.BandwidthAvailableForImmediateFlip	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.CriticalPoint	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.CursorBufferSize	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.CursorChunkSize	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DCFCLK	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DCFCLKDeepSleep	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DETBufferSizeInTime	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLK	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLKDelaySubtotal	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLKRampingMargin	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLKWithRamping	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLKWithRampingRoundedToDFSGranularity	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLKWithoutRamping	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DISPCLK_calculated	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DPPCLKDelayCNVCCursor	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DPPCLKDelayCNVCFormater	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DPPCLKDelaySCL	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DPPCLKDelaySCLLBOnly	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DPPCLKDelaySubtotal	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DRAMChannelWidth	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DRAMClockChangeLatency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DRAMClockChangeLatencyOverride	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DRAMClockChangeWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.DRAMSpeed	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.Downspreading	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.EffectiveDETLBLinesChroma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.EffectiveDETLBLinesLuma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.EffectiveDETPlusLBLinesChroma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.EffectiveDETPlusLBLinesLuma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.EffectiveFECOverhead	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.ExtraLatency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FCLKChangeLatency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FECOverhead	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FabricAndDRAMBandwidth	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FabricClock	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FinalFillLevel	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FinalFillMargin	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FractionOfUrgentBandwidth	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FractionOfUrgentBandwidthImmediateFlip	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.GPUVMMinPageSize	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.GlobalDPPCLK	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.HostVMMinPageSize	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.InitFillLevel	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.LastPixelOfLineExtraWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.LinesInDETChroma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.LinesInDETLuma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.LinesToFinishSwathTransferStutterCriticalPlane	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxDCHUBToPSCLThroughput	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxDispclkRoundedDownToDFSGranularity	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxDppclkRoundedDownToDFSGranularity	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxHSCLRatio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxPSCLToLBThroughput	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxTotalVActiveRDBandwidth	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxVRatioPre	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxVSCLRatio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaxVStartup	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaximumReadBandwidthWithPrefetch	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaximumReadBandwidthWithoutPrefetch	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaximumSwathWidthInDETBuffer	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaximumSwathWidthInLineBuffer	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaximumSwathWidthInLineBufferChroma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaximumSwathWidthInLineBufferLuma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MaximumSwathWidthSupport	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MinActiveDRAMClockChangeLatencySupported	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MinActiveDRAMClockChangeMargin	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MinFullDETBufferingTime	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MinPixelChunkSizeBytes	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.MinUrgentLatencySupportUs	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.NextMaxVStartup	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.NonUrgentLatencyTolerance	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.NumberOfChannels	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.Outbpp	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PDEAndMetaPTEBytesPerFrameC	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PDEAndMetaPTEBytesPerFrameY	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PTEGroupSize	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PartOfBurstThatFitsInROB	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PlaneRequiredDISPCLK	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PlaneRequiredDISPCLKWithODMCombine	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PlaneRequiredDISPCLKWithODMCombine2To1	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PlaneRequiredDISPCLKWithODMCombine4To1	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.PlaneRequiredDISPCLKWithoutODMCombine	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.RemainingFillLevel	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.ReturnBW	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.ReturnBWToDCNPerState	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.ReturnBandwidthToDCN	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.ReturnBusWidth	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.RoundTripPingLatencyCycles	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.RoundedUpMaxSwathSizeBytesC	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.RoundedUpMaxSwathSizeBytesY	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SMNLatency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SOCCLK	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SREnterPlusExitTime	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SREnterPlusExitZ8Time	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SRExitTime	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SRExitZ8Time	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SmallestVBlank	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SrcActiveDrainRate	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.StutterBurstTime	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.StutterEfficiency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.StutterExitWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.StutterPeriod	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.StutterPeriodBestCase	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SurfaceRequiredDISPCLK	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SurfaceRequiredDISPCLKWithoutODMCombine	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SwathWidthGranularityC	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SwathWidthGranularityY	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.SwathWidthYCriticalPlane	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.TCalc	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.TFinalxFill	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.TInitXFill	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.TWait	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.TimeCalc	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.TotalBandwidthConsumedGBytePerSecond	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.TotalDSCUnitsRequired	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.TotalDataReadBandwidth	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.TotalNumberOfActiveOTG	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.TotalRowReadBandwidth	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.TslvChk	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.USRRetrainingLatency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.UrgentExtraLatency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.UrgentLatency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.UrgentLatencyAdjustmentFabricClockComponent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.UrgentLatencyAdjustmentFabricClockReference	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.UrgentLatencySupportUsChroma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.UrgentLatencySupportUsLuma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.UrgentOutOfOrderReturnPerChannel	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.UrgentOutOfOrderReturnPerChannelPixelDataOnly	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.UrgentOutOfOrderReturnPerChannelPixelMixedWithVMData	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.UrgentOutOfOrderReturnPerChannelVMDataOnly	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.UrgentWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.VBlankTime	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.VStartupMargin	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.Watermark.DRAMClockChangeWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.Watermark.FCLKChangeWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.Watermark.StutterEnterPlusExitWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.Watermark.StutterExitWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.Watermark.USRRetrainingWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.Watermark.UrgentWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.Watermark.WritebackDRAMClockChangeWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.Watermark.WritebackFCLKChangeWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.Watermark.WritebackUrgentWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.Watermark.Z8StutterEnterPlusExitWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.Watermark.Z8StutterExitWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.WritebackChromaVExtra	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.WritebackDISPCLK	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.WritebackInterfaceBufferSize	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.WritebackLatency	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.WritebackLineBufferChromaBufferSize	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.WritebackLineBufferLumaBufferSize	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.WritebackLineBufferSize	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.WritebackLumaVExtra	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.WritebackMaxHSCLRatio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.WritebackMaxHSCLTaps	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.WritebackMaxVSCLRatio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.WritebackMaxVSCLTaps	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.WritebackMinHSCLRatio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.WritebackMinVSCLRatio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.WritebackRequiredDISPCLK	-9.223372e+18-9.223372e+18
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PARAM_VALUE	1	state->bw_ctx.dml.vba.XFCBusTransportTime	-9.223372e+18-9.223372e+18
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PARAM_VALUE	1	state->bw_ctx.dml.vba.XFCTSlvVupdateOffset	-9.223372e+18-9.223372e+18
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PARAM_VALUE	1	state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank	-9.223372e+18-9.223372e+18
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PARAM_VALUE	1	state->bw_ctx.dml.vba.ip.dsc_delay_factor_wa	-9.223372e+18-9.223372e+18
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PARAM_VALUE	1	state->bw_ctx.dml.vba.ip.min_prefetch_in_strobe_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.ip.underscan_factor	-9.223372e+18-9.223372e+18
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PARAM_VALUE	1	state->bw_ctx.dml.vba.ip.writeback_min_vscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.ip.xfc_fill_bw_overhead_percent	-9.223372e+18-9.223372e+18
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PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.dispclk_dppclk_vco_speed_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.downspread_percent	-9.223372e+18-9.223372e+18
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PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.dram_page_open_time_ns	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.dram_return_buffer_per_channel_bytes	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.dram_rw_turnaround_time_ns	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.dummy_pstate_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.fabric_datapath_to_dcn_data_return_bytes	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.fclk_change_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.ideal_dram_bw_after_urgent_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.mall_allocated_for_dcn_mbytes	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.max_avg_dram_bw_use_normal_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.max_avg_dram_bw_use_normal_strobe_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.max_avg_fabric_bw_use_normal_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.max_avg_sdp_bw_use_normal_percent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.max_vratio_pre	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.min_dcfclk	-9.223372e+18-9.223372e+18
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PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.pct_ideal_fabric_bw_after_urgent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.pct_ideal_sdp_bw_after_urgent	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.smn_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_z8_time_us	-9.223372e+18-9.223372e+18
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PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.sr_exit_z8_time_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.urgent_latency_adjustment_fabric_clock_component_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.urgent_latency_adjustment_fabric_clock_reference_mhz	-9.223372e+18-9.223372e+18
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PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.urgent_latency_pixel_mixed_with_vm_data_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.urgent_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.urgent_latency_vm_data_only_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.usr_retraining_latency_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.writeback_dram_clock_change_latency_us	-9.223372e+18-9.223372e+18
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PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.xfc_bus_transport_time_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.soc.xfc_xbuf_latency_tolerance_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.total_dcn_read_bw_with_flip	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->bw_ctx.dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst	-9.223372e+18-9.223372e+18
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PARAM_VALUE	1	state->dcn_bw_vars.total_repeater_delay	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.total_repeater_delay_time	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.total_write_bandwidth_consumed_gbyte_per_second	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.under_scan_factor	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.urgent_extra_latency	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.urgent_latency	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.urgent_latency_support_us_chroma	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.urgent_latency_support_us_luma	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.urgent_out_of_order_return_per_channel	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.urgent_round_trip_and_out_of_order_latency	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.urgent_watermark	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.v_blank_of_min_active_dram_clock_change_margin	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.v_blank_time	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.v_init_c	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.v_init_y	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.v_startup_lines	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.vmm_page_size	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.voltage_level_with_immediate_flip	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.voltage_level_without_immediate_flip	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.wr_bandwidth	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.write_back_latency	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.writeback_chroma_buffer_size	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.writeback_chunk_size	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.writeback_dram_clock_change_latency_margin	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.writeback_dram_clock_change_watermark	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->dcn_bw_vars.writeback_luma_buffer_size	-9223372036854775808.000000-9223372036854775808.000000
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_dlg_sys_param.deepsleep_dcfclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_dlg_sys_param.mem_trip_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_dlg_sys_param.t_extra_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_dlg_sys_param.t_mclk_wm_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_dlg_sys_param.t_sr_wm_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_dlg_sys_param.t_urg_wm_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_dlg_sys_param.total_flip_bw	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.clks_cfg.dcfclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.clks_cfg.dispclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.clks_cfg.dppclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.clks_cfg.refclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.clks_cfg.socclk_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.dout.output_bpp	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.dout.wb.wb_hratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.dout.wb.wb_vratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.dest.pixel_rate_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.scale_ratio_depth.hscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.scale_ratio_depth.hscl_ratio_c	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.scale_ratio_depth.vinit	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.scale_ratio_depth.vinit_bot	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.scale_ratio_depth.vinit_bot_c	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.scale_ratio_depth.vinit_c	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.scale_ratio_depth.vscl_ratio	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.scale_ratio_depth.vscl_ratio_c	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.src.dcc_fraction_of_zs_req_chroma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.src.dcc_fraction_of_zs_req_luma	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.src.xfc_params.xfc_tslv_vready_offset_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.src.xfc_params.xfc_tslv_vupdate_offset_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.dml_input.pipe.src.xfc_params.xfc_tslv_vupdate_width_us	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	state->res_ctx.temp_pipe.pipe_dlg_param.pixel_rate_mhz	-9.223372e+18-9.223372e+18
PARAM_VALUE	1	*state->bw_ctx.dml2->det_helper_scratch.dpps_per_surface	1
PARAM_VALUE	2	disp_cfg	4096-ptr_max
PARAM_VALUE	3	mapping	4096-ptr_max
DATA_SOURCE	1	state	$1
MEM_ZERO	0	&ctx->v20.dml_core_ctx.mp
MEM_ZERO	0	&ctx->v20.dml_core_ctx.ms
MEM_ZERO	0	&ctx->v20.dml_core_ctx.policy
MEM_ZERO	0	&ctx->v20.scratch
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL