Documented in 1 files:
Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 2 files:
- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c, line 648
- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c, line 554
Smatch caller information:
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c dpu_encoder_phys_wb_disable() -> dpu_encoder_helper_phys_cleanup()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phys_enc | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->dpu_kms | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->dpu_kms->catalog | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->dpu_kms->catalog->mdss_ver | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->dpu_kms->catalog->mdss_ver->core_major_ver | 5-10,12-13 |
| PARAM_VALUE | 0 | phys_enc->enable_state | 0,2-u32max |
| PARAM_VALUE | 0 | phys_enc->hw_ctl | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->hw_ctl->pending_cdm_flush_mask | 0 |
| PARAM_VALUE | 0 | phys_enc->hw_ctl->pending_cwb_flush_mask | 0 |
| PARAM_VALUE | 0 | phys_enc->hw_ctl->pending_dsc_flush_mask | 0 |
| PARAM_VALUE | 0 | phys_enc->hw_ctl->pending_flush_mask | 0 |
| PARAM_VALUE | 0 | phys_enc->hw_ctl->pending_intf_flush_mask | 0 |
| PARAM_VALUE | 0 | phys_enc->hw_ctl->pending_merge_3d_flush_mask | 0 |
| PARAM_VALUE | 0 | phys_enc->hw_ctl->pending_wb_flush_mask | 0 |
| PARAM_VALUE | 0 | phys_enc->hw_wb | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->ops.disable | 1-u64max |
| PARAM_VALUE | 0 | *phys_enc->hw_ctl->pending_dspp_flush_mask | 0-4294967295 |
| DATA_SOURCE | 0 | phys_enc | $0 |
| FUZZY_MAX | 0 | phys_enc->dpu_kms->catalog->mdss_ver->core_major_ver | 5 |
| MEM_ZERO | 0 | phys_enc->hw_ctl->pending_dspp_flush_mask | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | &dpu_enc->enc_lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &state->dev->mode_config.connection_mutex | ||
| HALF_LOCKED2 | &state->dev->mode_config.connection_mutex.mutex | ||
| TYPE_LOCK | (struct dpu_encoder_virt)->enc_lock |
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c dpu_encoder_phys_vid_disable() -> dpu_encoder_helper_phys_cleanup()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phys_enc | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->enable_state | 0,2-u32max |
| PARAM_VALUE | 0 | phys_enc->enc_spinlock | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->enc_spinlock->rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | phys_enc->hw_intf | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->hw_intf->hw.log_mask | 2,4,8,16,32,64,128,256,1024,2048,4096,8192 |
| PARAM_VALUE | 0 | phys_enc->hw_intf->mdss_ver->core_major_ver | 1,3-10,12-13 |
| PARAM_VALUE | 0 | phys_enc->hw_intf->ops.enable_timing | 3538371962127917056 |
| PARAM_VALUE | 0 | phys_enc->hw_intf->ops.get_status | 1094095729127616512 |
| PARAM_VALUE | 0 | phys_enc->ops.disable | 1-u64max |
| PARAM_VALUE | 0 | phys_enc->parent | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->parent->dev | 1-u64max |
| DATA_SOURCE | 0 | phys_enc | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | &dpu_enc->enc_lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &state->dev->mode_config.connection_mutex | ||
| HALF_LOCKED2 | &state->dev->mode_config.connection_mutex.mutex | ||
| TYPE_LOCK | (struct dpu_encoder_virt)->enc_lock |