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Documented in 1 files:

Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c dpu_encoder_phys_vid_enable() -> dpu_encoder_needs_periph_flush()

Type Parameter Key Value
PARAM_VALUE 0 phys_enc 4096-ptr_max
PARAM_VALUE 0 phys_enc->dpu_kms 4096-ptr_max
PARAM_VALUE 0 phys_enc->dpu_kms->base.dev 0,4096-ptr_max
PARAM_VALUE 0 phys_enc->dpu_kms->catalog 4096-ptr_max
PARAM_VALUE 0 phys_enc->dpu_kms->catalog->mdss_ver 4096-ptr_max
PARAM_VALUE 0 phys_enc->dpu_kms->catalog->mdss_ver->core_major_ver 0-10,12-13
PARAM_VALUE 0 phys_enc->enc_spinlock->rlock.dep_map->name 0-255
PARAM_VALUE 0 phys_enc->hw_cdm 0,4096-ptr_max
PARAM_VALUE 0 phys_enc->hw_cdm->hw.log_mask 2,4,8,16,32,64,128,256,1024,2048,4096,8192
PARAM_VALUE 0 phys_enc->hw_ctl 4096-ptr_max
PARAM_VALUE 0 phys_enc->hw_ctl->hw.log_mask 2,4,8,16,32,64,128,256,1024,2048,4096,8192
PARAM_VALUE 0 phys_enc->hw_ctl->mdss_ver->core_major_ver 1,3-10,12-13
PARAM_VALUE 0 phys_enc->hw_ctl->ops.update_pending_flush_cdm 4216254570941853696,5657579400177287168
PARAM_VALUE 0 phys_enc->hw_ctl->ops.update_pending_flush_merge_3d 1315501527986135040
PARAM_VALUE 0 phys_enc->hw_ctl->ops.update_pending_flush_periph 206543233677926400
PARAM_VALUE 0 phys_enc->hw_intf 4096-ptr_max
PARAM_VALUE 0 phys_enc->hw_intf->cap->prog_fetch_lines_worst_case 14,21,24-25,35
PARAM_VALUE 0 phys_enc->hw_intf->cap->type 0-1,3,10
PARAM_VALUE 0 phys_enc->hw_intf->hw.log_mask 2,4,8,16,32,64,128,256,1024,2048,4096,8192
PARAM_VALUE 0 phys_enc->hw_intf->mdss_ver->core_major_ver 1,3-10,12-13
PARAM_VALUE 0 phys_enc->hw_intf->ops.enable_timing 3538371962127917056
PARAM_VALUE 0 phys_enc->hw_mdptop->hw.log_mask 2,4,8,16,32,64,128,256,1024,2048,4096,8192
PARAM_VALUE 0 phys_enc->hw_pp 4096-ptr_max
PARAM_VALUE 0 phys_enc->hw_pp->merge_3d 0,4096-ptr_max
PARAM_VALUE 0 phys_enc->hw_pp->merge_3d->hw.log_mask 2,4,8,16,32,64,128,256,1024,2048,4096,8192
PARAM_VALUE 0 phys_enc->ops.enable 1-u64max
PARAM_VALUE 0 phys_enc->parent 4096-ptr_max
DATA_SOURCE 0 phys_enc $0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &dpu_enc->enc_lock
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex
TYPE_LOCK (struct dpu_encoder_virt)->enc_lock