Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c dpu_encoder_phys_vid_disable() -> dpu_encoder_phys_vid_wait_for_tx_complete()

Type Parameter Key Value
PARAM_VALUE 0 phys_enc 4096-ptr_max
PARAM_VALUE 0 phys_enc->enable_state 0,2-u32max
PARAM_VALUE 0 phys_enc->enc_spinlock 4096-ptr_max
PARAM_VALUE 0 phys_enc->enc_spinlock->rlock.dep_map->name 0-255
PARAM_VALUE 0 phys_enc->hw_intf 4096-ptr_max
PARAM_VALUE 0 phys_enc->hw_intf->hw.log_mask 2,4,8,16,32,64,128,256,1024,2048,4096,8192
PARAM_VALUE 0 phys_enc->hw_intf->ops.enable_timing 3538371962127917056
PARAM_VALUE 0 phys_enc->ops.disable 1-u64max
PARAM_VALUE 0 phys_enc->parent 4096-ptr_max
PARAM_VALUE 0 phys_enc->parent->dev 1-u64max
PARAM_VALUE 0 phys_enc->split_role 0-1,3-u32max
DATA_SOURCE 0 phys_enc $0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &dpu_enc->enc_lock
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex
TYPE_LOCK (struct dpu_encoder_virt)->enc_lock

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c dpu_encoder_phys_vid_disable() -> dpu_encoder_phys_vid_wait_for_tx_complete()

Type Parameter Key Value
PARAM_VALUE 0 phys_enc 4096-ptr_max
PARAM_VALUE 0 phys_enc->enable_state 0,2-u32max
PARAM_VALUE 0 phys_enc->enc_spinlock 4096-ptr_max
PARAM_VALUE 0 phys_enc->enc_spinlock->rlock.dep_map->name 0-255
PARAM_VALUE 0 phys_enc->hw_intf 4096-ptr_max
PARAM_VALUE 0 phys_enc->hw_intf->hw.log_mask 2,4,8,16,32,64,128,256,1024,2048,4096,8192
PARAM_VALUE 0 phys_enc->hw_intf->mdss_ver->core_major_ver 1,3-10,12-13
PARAM_VALUE 0 phys_enc->hw_intf->ops.enable_timing 3538371962127917056
PARAM_VALUE 0 phys_enc->hw_intf->ops.get_status 1094095729127616512
PARAM_VALUE 0 phys_enc->ops.disable 1-u64max
PARAM_VALUE 0 phys_enc->parent 4096-ptr_max
PARAM_VALUE 0 phys_enc->parent->dev 1-u64max
PARAM_VALUE 0 phys_enc->split_role 0-1,3-u32max
DATA_SOURCE 0 phys_enc $0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &dpu_enc->enc_lock
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex
TYPE_LOCK (struct dpu_encoder_virt)->enc_lock

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c dpu_encoder_wait_for_tx_complete() -> (struct dpu_encoder_phys_ops)->wait_for_tx_complete()

Type Parameter Key Value
PARAM_VALUE 0 phys_enc 4096-ptr_max
PARAM_VALUE 0 phys_enc->ops.wait_for_tx_complete 1-u64max
CONTAINER 0 -56-8+0 $(-1)
TASK_NOT_RUNNING
LOCK2 &dpu_enc->enc_lock
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex
TYPE_LOCK (struct dpu_encoder_virt)->enc_lock