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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c dpu_encoder_setup_display() -> dpu_encoder_virt_add_phys_encs()

Type Parameter Key Value
PARAM_VALUE 0 dev->managed.resources.next 4096-ptr_max
PARAM_VALUE 0 dev->managed.resources.next->next 4096-ptr_max
PARAM_VALUE 0 dev->managed.resources.next->prev 4096-ptr_max
PARAM_VALUE 1 disp_info 1657173545188577280,2278173865479389184,6494558862334038016,7444565398430887936
PARAM_VALUE 1 disp_info->intf_type 1,3,10,256
PARAM_VALUE 1 disp_info->is_cmd_mode 0
PARAM_VALUE 2 dpu_enc 4096-ptr_max
PARAM_VALUE 2 dpu_enc->base.helper_private 1538882101218402304
PARAM_VALUE 2 dpu_enc->base.helper_private->atomic_disable 3819773845715333120
PARAM_VALUE 2 dpu_enc->base.helper_private->atomic_enable 401157041695129600
PARAM_VALUE 2 dpu_enc->base.helper_private->atomic_mode_set 6413651142976700416
PARAM_VALUE 2 dpu_enc->base.helper_private->commit 0
PARAM_VALUE 2 dpu_enc->base.helper_private->detect 0
PARAM_VALUE 2 dpu_enc->base.helper_private->disable 0
PARAM_VALUE 2 dpu_enc->base.helper_private->dpms 0
PARAM_VALUE 2 dpu_enc->base.helper_private->enable 0
PARAM_VALUE 2 dpu_enc->base.helper_private->mode_set 0
PARAM_VALUE 2 dpu_enc->base.helper_private->prepare 0
PARAM_VALUE 2 dpu_enc->cur_master 0-ptr_max
PARAM_VALUE 2 dpu_enc->cur_master->cdm_cfg.csc_cfg 0,1560120830880616448
PARAM_VALUE 2 dpu_enc->cur_master->cdm_cfg.h_cdwn_type 0,3
PARAM_VALUE 2 dpu_enc->cur_master->cdm_cfg.output_bit_depth 0-1
PARAM_VALUE 2 dpu_enc->cur_master->cdm_cfg.output_height 0-u16max
PARAM_VALUE 2 dpu_enc->cur_master->cdm_cfg.output_type 0-1
PARAM_VALUE 2 dpu_enc->cur_master->cdm_cfg.output_width 0-u16max
PARAM_VALUE 2 dpu_enc->cur_master->cdm_cfg.v_cdwn_type 0,4
PARAM_VALUE 2 dpu_enc->cur_master->dpu_kms 4096-ptr_max
PARAM_VALUE 2 dpu_enc->cur_master->enable_state 1
PARAM_VALUE 2 dpu_enc->cur_master->enc_spinlock 4096-ptr_max
PARAM_VALUE 2 dpu_enc->cur_master->hw_intf 1-u64max
PARAM_VALUE 2 dpu_enc->cur_master->intf_mode 1-2,4
PARAM_VALUE 2 dpu_enc->cur_master->ops.atomic_mode_set 2379478280331784192,3437205120925167616,6383234000274079744
PARAM_VALUE 2 dpu_enc->cur_master->ops.cleanup_wb_job 7582299421898919936
PARAM_VALUE 2 dpu_enc->cur_master->ops.control_vblank_irq 855822492191576064,8272337205078994944
PARAM_VALUE 2 dpu_enc->cur_master->ops.disable 5030180429280284672,7461049279589138432,8733806854942502912
PARAM_VALUE 2 dpu_enc->cur_master->ops.enable 3081880462080151552,7873078172469575680,8593322387588722688
PARAM_VALUE 2 dpu_enc->cur_master->ops.get_frame_count 6009132985346416640
PARAM_VALUE 2 dpu_enc->cur_master->ops.get_line_count 8007523017135996928,8694762942577909760
PARAM_VALUE 2 dpu_enc->cur_master->ops.handle_post_kickoff 3986980926535012352,6523788492413022208,8070038609634304000
PARAM_VALUE 2 dpu_enc->cur_master->ops.irq_disable 152311294509961216,4139229721045762048,7436783868904538112
PARAM_VALUE 2 dpu_enc->cur_master->ops.irq_enable 354054634504601600,1580995930432512000,5151088090641346560
PARAM_VALUE 2 dpu_enc->cur_master->ops.is_master 446145108356251648,2219978841978474496,5583866903323258880
PARAM_VALUE 2 dpu_enc->cur_master->ops.is_valid_for_commit 5874120762872872960
PARAM_VALUE 2 dpu_enc->cur_master->ops.needs_single_flush 1480359503384989696,3735843225604661248,7992352030926385152
PARAM_VALUE 2 dpu_enc->cur_master->ops.prepare_for_kickoff 2409425046870953984,3969192917357629440,7176623385381912576
PARAM_VALUE 2 dpu_enc->cur_master->ops.prepare_idle_pc 3029404526954151936
PARAM_VALUE 2 dpu_enc->cur_master->ops.prepare_wb_job 303810306228350976
PARAM_VALUE 2 dpu_enc->cur_master->ops.restore 4623075662269198336
PARAM_VALUE 2 dpu_enc->cur_master->ops.trigger_start 303489101515644928,5107280492064321536
PARAM_VALUE 2 dpu_enc->cur_master->ops.wait_for_commit_done 1362778127542730752,1476642092004487168,4103959487474827264
PARAM_VALUE 2 dpu_enc->cur_master->ops.wait_for_tx_complete 3052311146407768064,6429847505993203712
PARAM_VALUE 2 dpu_enc->cur_master->parent 0,4096-ptr_max
PARAM_VALUE 2 dpu_enc->cur_master->pending_kickoff_wq.head.next 4096-ptr_max
PARAM_VALUE 2 dpu_enc->cur_master->pending_kickoff_wq.head.prev 4096-ptr_max
PARAM_VALUE 2 dpu_enc->cur_master->split_role 0-2
PARAM_VALUE 2 dpu_enc->cur_master->vblank_ctl_lock.magic 4096-ptr_max
PARAM_VALUE 2 dpu_enc->cur_master->vblank_refcount 0
PARAM_VALUE 2 dpu_enc->cur_master->vsync_cnt.counter 0
PARAM_VALUE 2 dpu_enc->cur_slave 0-ptr_max
PARAM_VALUE 2 dpu_enc->cur_slave->dpu_kms 4096-ptr_max
PARAM_VALUE 2 dpu_enc->cur_slave->enable_state 1
PARAM_VALUE 2 dpu_enc->cur_slave->enc_spinlock 4096-ptr_max
PARAM_VALUE 2 dpu_enc->cur_slave->intf_mode 1-2,4
PARAM_VALUE 2 dpu_enc->cur_slave->ops.atomic_mode_set 2379478280331784192,3437205120925167616,6383234000274079744
PARAM_VALUE 2 dpu_enc->cur_slave->ops.control_vblank_irq 855822492191576064,8272337205078994944
PARAM_VALUE 2 dpu_enc->cur_slave->ops.disable 5030180429280284672,7461049279589138432,8733806854942502912
PARAM_VALUE 2 dpu_enc->cur_slave->ops.enable 3081880462080151552,7873078172469575680,8593322387588722688
PARAM_VALUE 2 dpu_enc->cur_slave->ops.get_frame_count 6009132985346416640
PARAM_VALUE 2 dpu_enc->cur_slave->ops.get_line_count 8007523017135996928,8694762942577909760
PARAM_VALUE 2 dpu_enc->cur_slave->ops.handle_post_kickoff 3986980926535012352,6523788492413022208,8070038609634304000
PARAM_VALUE 2 dpu_enc->cur_slave->ops.irq_disable 152311294509961216,4139229721045762048,7436783868904538112
PARAM_VALUE 2 dpu_enc->cur_slave->ops.irq_enable 354054634504601600,1580995930432512000,5151088090641346560
PARAM_VALUE 2 dpu_enc->cur_slave->ops.is_master 446145108356251648,2219978841978474496,5583866903323258880
PARAM_VALUE 2 dpu_enc->cur_slave->ops.needs_single_flush 1480359503384989696,3735843225604661248,7992352030926385152
PARAM_VALUE 2 dpu_enc->cur_slave->ops.prepare_for_kickoff 2409425046870953984,3969192917357629440,7176623385381912576
PARAM_VALUE 2 dpu_enc->cur_slave->ops.wait_for_commit_done 1362778127542730752,1476642092004487168,4103959487474827264
PARAM_VALUE 2 dpu_enc->cur_slave->ops.wait_for_tx_complete 3052311146407768064,6429847505993203712
PARAM_VALUE 2 dpu_enc->cur_slave->parent 4096-ptr_max
PARAM_VALUE 2 dpu_enc->cur_slave->pending_kickoff_wq.head.next 4096-ptr_max
PARAM_VALUE 2 dpu_enc->cur_slave->pending_kickoff_wq.head.prev 4096-ptr_max
PARAM_VALUE 2 dpu_enc->cur_slave->split_role 2
PARAM_VALUE 2 dpu_enc->cur_slave->vblank_ctl_lock.magic 4096-ptr_max
PARAM_VALUE 2 dpu_enc->cur_slave->vblank_refcount 0
PARAM_VALUE 2 dpu_enc->cur_slave->vsync_cnt.counter 0
PARAM_VALUE 2 dpu_enc->enabled 0
PARAM_VALUE 2 dpu_enc->enc_lock.dep_map->name 0-255
PARAM_VALUE 2 dpu_enc->enc_lock.first_waiter 0,4096-ptr_max
PARAM_VALUE 2 dpu_enc->enc_lock.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 2 dpu_enc->enc_lock.magic 4096-ptr_max
PARAM_VALUE 2 dpu_enc->enc_lock.osq.tail.counter 0-s32max
PARAM_VALUE 2 dpu_enc->enc_lock.wait_lock.dep_map->name 0-255
PARAM_VALUE 2 dpu_enc->enc_lock.wait_lock.owner (-1)
PARAM_VALUE 2 dpu_enc->enc_lock.wait_lock.owner_cpu u32max
PARAM_VALUE 2 dpu_enc->num_phys_encs 0-2
PARAM_VALUE 2 dpu_enc->rc_lock.dep_map->name 0-255
PARAM_VALUE 2 dpu_enc->rc_lock.first_waiter 0
PARAM_VALUE 2 dpu_enc->rc_lock.magic 4096-ptr_max
PARAM_VALUE 2 dpu_enc->rc_lock.osq.tail.counter 0
PARAM_VALUE 2 dpu_enc->rc_lock.owner.counter 0
PARAM_VALUE 3 params 2345989238004023296
PARAM_VALUE 3 params->dpu_kms 4096-ptr_max
PARAM_VALUE 3 params->enc_spinlock 4096-ptr_max
PARAM_VALUE 3 params->parent 4096-ptr_max
PARAM_VALUE 3 params->split_role 0-2
CAPPED_DATA 1 disp_info->intf_type 1
CAPPED_DATA 2 &dpu_enc->enc_lock 1
DATA_SOURCE 1 disp_info $2
DATA_SOURCE 2 dpu_enc $0
BIT_INFO 1 disp_info->intf_type 0x0,0x10f
HARD_MAX 1 disp_info->intf_type 256
MEM_ZERO 1 disp_info
MEM_ZERO 3 params
RX_PATH
TASK_NOT_RUNNING
LOCK2 2 &dpu_enc->enc_lock
HALF_LOCKED2 global &component_mutex
TYPE_LOCK (struct dpu_encoder_virt)->enc_lock