Documented in 1 files:

Defined in 1 files as a function:

Referenced in 12 files:

Smatch caller information:

drivers/gpu/drm/tegra/gem.c tegra_bo_iommu_map() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 4096-ptr_max
PARAM_VALUE 1 node 4096-ptr_max
PARAM_VALUE 3 alignment 4096
PARAM_VALUE 4 color 0
PARAM_VALUE 5 mode 0
BUF_SIZE 1 node 176
DATA_SOURCE 1 node r _kzalloc_noprof
RX_PATH
TASK_NOT_RUNNING
USER_DATA 2 size 0-u64max[c]
UNITS 2 size unit_byte
UNITS 3 alignment unit_byte
LOCK2 &tegra->mm_lock
HALF_LOCKED2 &drm->object_name_lock
HALF_LOCKED2 &file_priv->prime.lock
TYPE_LOCK (struct tegra_drm)->mm_lock

drivers/accel/amdxdna/amdxdna_gem.c amdxdna_gem_heap_alloc() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 4096-ptr_max
PARAM_VALUE 1 node 4096-ptr_max
PARAM_VALUE 2 size 4096-536870912
PARAM_VALUE 3 alignment 4096,32768
PARAM_VALUE 4 color 0
PARAM_VALUE 5 mode 0
CAPPED_DATA 2 size 1
CAPPED_DATA 2 size 1
USER_DATA 2 size 4096-536870912[c]
UNITS 2 size unit_byte
LOCK2 &client->mm_lock
HALF_LOCKED2 _T->lock
HALF_LOCKED2 global &drm_unplug_srcu
TYPE_LOCK (struct amdxdna_client)->mm_lock

drivers/gpu/drm/xe/xe_ggtt.c xe_ggtt_insert_node_locked() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 4096-ptr_max
PARAM_VALUE 1 node 4096-ptr_max
PARAM_VALUE 4 color 0
PARAM_VALUE 5 mode 0,2
DATA_SOURCE 2 size $1
DATA_SOURCE 3 alignment $2
DATA_SOURCE 5 mode $3
HARD_MAX 5 mode 2
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &ggtt->lock
HALF_LOCKED2 _T->lock

drivers/gpu/drm/panfrost/panfrost_gem.c panfrost_gem_open() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 4096-ptr_max
PARAM_VALUE 1 node 4096-ptr_max
PARAM_VALUE 2 size 0-4503599627370495
PARAM_VALUE 3 alignment 0-4503599627370495
PARAM_VALUE 4 color 0-1
PARAM_VALUE 5 mode 0
FUZZY_MAX 3 alignment 512
FUZZY_MAX 4 color 1
HARD_MAX 4 color 1
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
USER_DATA 2 size 0-4503599627370495[c]
USER_DATA 3 alignment 0-4503599627370495[c]
UNITS 2 size unit_page
UNITS 3 alignment unit_page
LOCK2 &mapping->mmu->mm_lock
HALF_LOCKED2 &perfcnt->lock
TYPE_LOCK (struct panfrost_mmu)->mm_lock

drivers/gpu/drm/v3d/v3d_bo.c v3d_bo_create_finish() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 4096-ptr_max
PARAM_VALUE 1 node 4096-ptr_max
PARAM_VALUE 2 size 0-4503599627370495
PARAM_VALUE 3 alignment 1,16,256
PARAM_VALUE 4 color 0
PARAM_VALUE 5 mode 0
PREEMPT_ADD <- disables preempt
LOCK2 &v3d->mm_lock
HALF_LOCKED2 &dev->object_name_lock
HALF_LOCKED2 &file_priv->prime.lock
TYPE_LOCK (struct v3d_dev)->mm_lock

drivers/gpu/drm/tests/drm_mm_test.c drm_test_mm_once() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 173250437256478720
PARAM_VALUE 0 mm->color_adjust 0
PARAM_VALUE 0 mm->head_node.hole_size 1
PARAM_VALUE 0 mm->head_node.hole_stack.next 4096-ptr_max
PARAM_VALUE 0 mm->head_node.hole_stack.prev 4096-ptr_max
PARAM_VALUE 0 mm->head_node.mm 4096-ptr_max
PARAM_VALUE 0 mm->head_node.node_list.next 4096-ptr_max
PARAM_VALUE 0 mm->head_node.node_list.prev 4096-ptr_max
PARAM_VALUE 0 mm->head_node.rb_hole_size.__rb_parent_color 1
PARAM_VALUE 0 mm->head_node.rb_hole_size.rb_left 4096-ptr_max
PARAM_VALUE 0 mm->head_node.rb_hole_size.rb_right 4096-ptr_max
PARAM_VALUE 0 mm->head_node.start 7
PARAM_VALUE 0 mm->head_node.subtree_max_hole 1
PARAM_VALUE 0 mm->hole_stack.next 4096-ptr_max
PARAM_VALUE 0 mm->hole_stack.prev 4096-ptr_max
PARAM_VALUE 0 mm->holes_addr.rb_node 1-u64max
PARAM_VALUE 1 node 3263757238339346432
PARAM_VALUE 2 size 2
PARAM_VALUE 3 alignment 0
PARAM_VALUE 4 color 0
PARAM_VALUE 5 mode 1-2
DATA_SOURCE 5 mode $1
HARD_MAX 5 mode 2
MEM_ZERO 1 node

drivers/gpu/drm/tests/drm_mm_test.c expect_insert() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 6837542392382337024
PARAM_VALUE 0 mm->color_adjust 0
PARAM_VALUE 0 mm->head_node.hole_size 1
PARAM_VALUE 0 mm->head_node.hole_stack.next 4096-ptr_max
PARAM_VALUE 0 mm->head_node.hole_stack.prev 4096-ptr_max
PARAM_VALUE 0 mm->head_node.mm 4096-ptr_max
PARAM_VALUE 0 mm->head_node.node_list.next 4096-ptr_max
PARAM_VALUE 0 mm->head_node.node_list.prev 4096-ptr_max
PARAM_VALUE 0 mm->head_node.rb_hole_size.__rb_parent_color 1
PARAM_VALUE 0 mm->head_node.rb_hole_size.rb_left 4096-ptr_max
PARAM_VALUE 0 mm->head_node.rb_hole_size.rb_right 4096-ptr_max
PARAM_VALUE 0 mm->head_node.start 18446744073709551614
PARAM_VALUE 0 mm->head_node.subtree_max_hole 1
PARAM_VALUE 0 mm->hole_stack.next 4096-ptr_max
PARAM_VALUE 0 mm->hole_stack.prev 4096-ptr_max
PARAM_VALUE 1 node 4096-ptr_max
PARAM_VALUE 4 color 1-63,18446744071562067968-u64max
BUF_SIZE 1 node 176
DATA_SOURCE 0 mm $1
DATA_SOURCE 1 node $2
DATA_SOURCE 2 size $3
DATA_SOURCE 3 alignment $4
DATA_SOURCE 4 color $5

drivers/accel/rocket/rocket_gem.c rocket_ioctl_create_bo() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 4096-ptr_max
PARAM_VALUE 1 node 4096-ptr_max
PARAM_VALUE 2 size 0-u32max
PARAM_VALUE 3 alignment 4096
PARAM_VALUE 4 color 0
PARAM_VALUE 5 mode 0
USER_DATA 2 size 0-u32max[u]
UNITS 3 alignment unit_byte
LOCK2 &rocket_priv->mm_lock
TYPE_LOCK (struct rocket_file_priv)->mm_lock

drivers/gpu/drm/lima/lima_vm.c drm_mm_insert_node() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 4096-ptr_max
PARAM_VALUE 1 node 4096-ptr_max
PARAM_VALUE 3 alignment 0
PARAM_VALUE 4 color 0
PARAM_VALUE 5 mode 0
DATA_SOURCE 0 mm $0
DATA_SOURCE 1 node $1
DATA_SOURCE 2 size $2
RX_PATH
TASK_NOT_RUNNING
LOCK2 &bo->lock
LOCK2 &vm->lock
HALF_LOCKED2 &dev->object_name_lock
HALF_LOCKED2 &file->driver_priv->mutex
HALF_LOCKED2 &file->prime.lock
HALF_LOCKED2 &obj->dev->object_name_lock
TYPE_LOCK (struct lima_bo)->lock
TYPE_LOCK (struct lima_vm)->lock

drivers/gpu/drm/virtio/virtgpu_vram.c drm_mm_insert_node() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 4096-ptr_max
PARAM_VALUE 1 node 4096-ptr_max
PARAM_VALUE 3 alignment 0
PARAM_VALUE 4 color 0
PARAM_VALUE 5 mode 0
DATA_SOURCE 0 mm $0
DATA_SOURCE 1 node $1
DATA_SOURCE 2 size $2
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
UNITS 2 size unit_byte
LOCK2 &vgdev->host_visible_lock
HALF_LOCKED2 global &map_lock
TYPE_LOCK (struct virtio_gpu_device)->host_visible_lock

drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c drm_mm_insert_node() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 4096-ptr_max
PARAM_VALUE 1 node 4096-ptr_max
PARAM_VALUE 2 size 0-4503599627370495
PARAM_VALUE 3 alignment 0
PARAM_VALUE 4 color 0
PARAM_VALUE 5 mode 0
CAPPED_DATA 2 size 1
CAPPED_DATA 2 size 1
DATA_SOURCE 0 mm $0
DATA_SOURCE 1 node $1
DATA_SOURCE 2 size $2
NOSPEC 2 size
NOSPEC 2 size
MEM_ZERO 1 node
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
USER_DATA 2 size 1-1048576[c]
LOCK2 &man->lock
LOCK2 &man->space_mutex
HALF_LOCKED2 &man->cur_mutex
TYPE_LOCK (struct vmw_cmdbuf_man)->lock
TYPE_LOCK (struct vmw_cmdbuf_man)->space_mutex

drivers/gpu/drm/vc4/vc4_hvs.c drm_mm_insert_node() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 4096-ptr_max
PARAM_VALUE 1 node 4096-ptr_max
PARAM_VALUE 3 alignment 0
PARAM_VALUE 4 color 0
PARAM_VALUE 5 mode 0
DATA_SOURCE 0 mm $0
DATA_SOURCE 1 node $1
DATA_SOURCE 2 size $2
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &vc4->hvs->mm_lock
HALF_LOCKED2 flags

drivers/gpu/drm/xe/xe_mem_pool.c drm_mm_insert_node() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 4096-ptr_max
PARAM_VALUE 1 node 4096-ptr_max
PARAM_VALUE 3 alignment 0
PARAM_VALUE 4 color 0
PARAM_VALUE 5 mode 0
DATA_SOURCE 0 mm $0
DATA_SOURCE 1 node $1
DATA_SOURCE 2 size $2
RX_PATH
TASK_NOT_RUNNING
LOCK2 _T->lock
HALF_LOCKED2 ttm_bo->base.resv

drivers/gpu/drm/rockchip/rockchip_drm_gem.c rockchip_gem_iommu_map() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 4096-ptr_max
PARAM_VALUE 1 node 4096-ptr_max
PARAM_VALUE 3 alignment 4096
PARAM_VALUE 4 color 0
PARAM_VALUE 5 mode 0
RX_PATH
TASK_NOT_RUNNING
UNITS 2 size unit_byte
UNITS 3 alignment unit_byte
LOCK2 &private->mm_lock
HALF_LOCKED2 &drm->object_name_lock
HALF_LOCKED2 &file_priv->prime.lock
TYPE_LOCK (struct rockchip_drm_private)->mm_lock

drivers/gpu/drm/vc4/vc4_plane.c vc4_plane_allocate_lbm() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 4096-ptr_max
PARAM_VALUE 1 node 4096-ptr_max
PARAM_VALUE 3 alignment 1
PARAM_VALUE 4 color 0
PARAM_VALUE 5 mode 0
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
LOCK2 &vc4->hvs->mm_lock
LOCK2 irqflags
HALF_LOCKED2 &client->modeset_mutex
HALF_LOCKED2 &dev->mode_config.connection_mutex
HALF_LOCKED2 &dev->mode_config.connection_mutex.mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex
TYPE_LOCK (struct vc4_hvs)->mm_lock

drivers/gpu/drm/vc4/vc4_plane.c vc6_plane_allocate_upm() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 4096-ptr_max
PARAM_VALUE 1 node 4096-ptr_max
PARAM_VALUE 2 size 256-u32max
PARAM_VALUE 3 alignment 256
PARAM_VALUE 4 color 0
PARAM_VALUE 5 mode 0
DATA_SOURCE 2 size r vc6_upm_size
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
LOCK2 &hvs->mm_lock
LOCK2 irqflags
HALF_LOCKED2 &client->modeset_mutex
HALF_LOCKED2 &dev->mode_config.connection_mutex
HALF_LOCKED2 &dev->mode_config.connection_mutex.mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex
TYPE_LOCK (struct vc4_hvs)->mm_lock

drivers/gpu/drm/drm_vma_manager.c drm_mm_insert_node() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 4096-ptr_max
PARAM_VALUE 1 node 4096-ptr_max
PARAM_VALUE 3 alignment 0
PARAM_VALUE 4 color 0
PARAM_VALUE 5 mode 0
DATA_SOURCE 0 mm $0
DATA_SOURCE 1 node $1
DATA_SOURCE 2 size $2
RX_PATH
TASK_NOT_RUNNING
USER_DATA 2 size 0-4503599627370495[c]
UNITS 2 size unit_page
LOCK2 &mgr->vm_lock
TYPE_LOCK (struct drm_vma_offset_manager)->vm_lock

drivers/accel/amdxdna/amdxdna_cbuf.c amdxdna_get_cbuf() -> drm_mm_insert_node_generic()

Type Parameter Key Value
PARAM_VALUE 0 mm 4096-ptr_max
PARAM_VALUE 1 node 4096-ptr_max
PARAM_VALUE 2 size 4096-u64max
PARAM_VALUE 3 alignment 0,67108864
PARAM_VALUE 4 color 0
PARAM_VALUE 5 mode 0
DATA_SOURCE 2 size $1
DATA_SOURCE 3 alignment $2
FUZZY_MAX 3 alignment 0
BIT_INFO 2 size 0x0,0xfffffffffffff000
BIT_INFO 2 size 0x0,0xfffffffffffff000
USER_DATA 2 size 4096-u64max[c]
LOCK2 &carveout->lock
TYPE_LOCK (struct amdxdna_carveout)->lock