dw_hdmi_top_write identifier - Linux source code next-20260811

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linux

Versions

FIXME
- FIXME
  - next-20260811

Defined in 1 files as a function:

drivers/gpu/drm/meson/meson_dw_hdmi.c, line 188 (as a function)

Referenced in 1 files:

drivers/gpu/drm/meson/meson_dw_hdmi.c
- line 573
- line 582

Smatch caller information:

drivers/gpu/drm/meson/meson_dw_hdmi.c dw_hdmi_phy_init() -> (struct meson_dw_hdmi_data)->top_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	dw_hdmi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->data	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->priv	4096-ptr_max
PARAM_VALUE	1	addr	10
PARAM_VALUE	2	data	0
BUF_SIZE	0	dw_hdmi	224
DATA_SOURCE	0	dw_hdmi	$1
CONTAINER	0	-8-168+0	$(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2		&hdmi->mutex
TYPE_LOCK		(struct dw_hdmi)->mutex

drivers/gpu/drm/meson/meson_dw_hdmi.c dw_hdmi_phy_init() -> (struct meson_dw_hdmi_data)->top_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	dw_hdmi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->data	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->priv	4096-ptr_max
PARAM_VALUE	1	addr	11
PARAM_VALUE	2	data	67044351
BUF_SIZE	0	dw_hdmi	224
DATA_SOURCE	0	dw_hdmi	$1
CONTAINER	0	-8-168+0	$(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2		&hdmi->mutex
TYPE_LOCK		(struct dw_hdmi)->mutex

drivers/gpu/drm/meson/meson_dw_hdmi.c dw_hdmi_phy_init() -> (struct meson_dw_hdmi_data)->top_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	dw_hdmi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->data	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->priv	4096-ptr_max
PARAM_VALUE	1	addr	10
PARAM_VALUE	2	data	2031647
BUF_SIZE	0	dw_hdmi	224
DATA_SOURCE	0	dw_hdmi	$1
CONTAINER	0	-8-168+0	$(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2		&hdmi->mutex
TYPE_LOCK		(struct dw_hdmi)->mutex

drivers/gpu/drm/meson/meson_dw_hdmi.c dw_hdmi_phy_init() -> (struct meson_dw_hdmi_data)->top_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	dw_hdmi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->data	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->priv	4096-ptr_max
PARAM_VALUE	1	addr	11
PARAM_VALUE	2	data	2031647
BUF_SIZE	0	dw_hdmi	224
DATA_SOURCE	0	dw_hdmi	$1
CONTAINER	0	-8-168+0	$(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2		&hdmi->mutex
TYPE_LOCK		(struct dw_hdmi)->mutex

drivers/gpu/drm/meson/meson_dw_hdmi.c dw_hdmi_phy_init() -> (struct meson_dw_hdmi_data)->top_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	dw_hdmi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->data	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->priv	4096-ptr_max
PARAM_VALUE	1	addr	12
PARAM_VALUE	2	data	1
BUF_SIZE	0	dw_hdmi	224
DATA_SOURCE	0	dw_hdmi	$1
CONTAINER	0	-8-168+0	$(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2		&hdmi->mutex
TYPE_LOCK		(struct dw_hdmi)->mutex

drivers/gpu/drm/meson/meson_dw_hdmi.c dw_hdmi_phy_init() -> (struct meson_dw_hdmi_data)->top_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	dw_hdmi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->data	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->priv	4096-ptr_max
PARAM_VALUE	1	addr	12
PARAM_VALUE	2	data	2
BUF_SIZE	0	dw_hdmi	224
DATA_SOURCE	0	dw_hdmi	$1
CONTAINER	0	-8-168+0	$(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2		&hdmi->mutex
TYPE_LOCK		(struct dw_hdmi)->mutex

drivers/gpu/drm/meson/meson_dw_hdmi.c dw_hdmi_setup_hpd() -> (struct meson_dw_hdmi_data)->top_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	dw_hdmi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->data	4096-ptr_max
PARAM_VALUE	1	addr	2
PARAM_VALUE	2	data	41120
BUF_SIZE	0	dw_hdmi	224
DATA_SOURCE	0	dw_hdmi	$1
CONTAINER	0	-8-168+0	$(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/meson/meson_dw_hdmi.c dw_hdmi_setup_hpd() -> (struct meson_dw_hdmi_data)->top_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	dw_hdmi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->data	4096-ptr_max
PARAM_VALUE	1	addr	5
PARAM_VALUE	2	data	6
BUF_SIZE	0	dw_hdmi	224
DATA_SOURCE	0	dw_hdmi	$1
CONTAINER	0	-8-168+0	$(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/meson/meson_dw_hdmi.c dw_hdmi_top_irq() -> (struct meson_dw_hdmi_data)->top_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	dw_hdmi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->data	4096-ptr_max
PARAM_VALUE	1	addr	5
DATA_SOURCE	0	dw_hdmi	$1
CONTAINER	0	-8-168+0	$(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	2	data	0-u32max
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		flags

drivers/gpu/drm/meson/meson_dw_hdmi.c dw_hdmi_top_write_bits() -> (struct meson_dw_hdmi_data)->top_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	dw_hdmi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->data	4096-ptr_max
PARAM_VALUE	1	addr	3
PARAM_VALUE	2	data	0,2-u32max
BUF_SIZE	0	dw_hdmi	224
DATA_SOURCE	0	dw_hdmi	$0
DATA_SOURCE	1	addr	$1
CONTAINER	0	-8-168+0	$(-1)
BIT_INFO	2	data	0x6,0xffffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	2	data	0,2-u32max[c]

drivers/gpu/drm/meson/meson_dw_hdmi.c meson_dw_hdmi_init() -> (struct meson_dw_hdmi_data)->top_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	dw_hdmi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->data	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->hdmitx_apb	0,4096-u64max
PARAM_VALUE	0	dw_hdmi->hdmitx_apb->array	0-1
PARAM_VALUE	0	dw_hdmi->hdmitx_ctrl	0,4096-u64max
PARAM_VALUE	0	dw_hdmi->hdmitx_ctrl->array	0-1
PARAM_VALUE	0	dw_hdmi->hdmitx_phy	0,4096-u64max
PARAM_VALUE	0	dw_hdmi->hdmitx_phy->array	0-1
PARAM_VALUE	0	dw_hdmi->priv	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->priv->hhi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->priv->hhi->async	0
PARAM_VALUE	1	addr	0
PARAM_VALUE	2	data	0
BUF_SIZE	0	dw_hdmi	s32min-(-2),1-s32max
BUF_SIZE	0	dw_hdmi	s32min-(-2),1-s32max
BUF_SIZE	0	dw_hdmi->hdmitx_apb	(-1),8,280
BUF_SIZE	0	dw_hdmi->hdmitx_ctrl	(-1),8,280
BUF_SIZE	0	dw_hdmi->hdmitx_phy	(-1),8,280
BUF_SIZE	0	dw_hdmi->priv	s32min-(-1),1-s32max
DATA_SOURCE	0	dw_hdmi	$0
CONTAINER	0	-8-168+0	$(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/meson/meson_dw_hdmi.c meson_dw_hdmi_init() -> (struct meson_dw_hdmi_data)->top_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	dw_hdmi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->data	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->hdmitx_apb	0,4096-u64max
PARAM_VALUE	0	dw_hdmi->hdmitx_apb->array	0-1
PARAM_VALUE	0	dw_hdmi->hdmitx_ctrl	0,4096-u64max
PARAM_VALUE	0	dw_hdmi->hdmitx_ctrl->array	0-1
PARAM_VALUE	0	dw_hdmi->hdmitx_phy	0,4096-u64max
PARAM_VALUE	0	dw_hdmi->hdmitx_phy->array	0-1
PARAM_VALUE	0	dw_hdmi->priv	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->priv->hhi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->priv->hhi->async	0
PARAM_VALUE	1	addr	1
PARAM_VALUE	2	data	255
BUF_SIZE	0	dw_hdmi	s32min-(-2),1-s32max
BUF_SIZE	0	dw_hdmi	s32min-(-2),1-s32max
BUF_SIZE	0	dw_hdmi->hdmitx_apb	(-1),8,280
BUF_SIZE	0	dw_hdmi->hdmitx_ctrl	(-1),8,280
BUF_SIZE	0	dw_hdmi->hdmitx_phy	(-1),8,280
BUF_SIZE	0	dw_hdmi->priv	s32min-(-1),1-s32max
DATA_SOURCE	0	dw_hdmi	$0
CONTAINER	0	-8-168+0	$(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/meson/meson_dw_hdmi.c meson_dw_hdmi_init() -> (struct meson_dw_hdmi_data)->top_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	dw_hdmi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->data	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->hdmitx_apb	0,4096-u64max
PARAM_VALUE	0	dw_hdmi->hdmitx_apb->array	0-1
PARAM_VALUE	0	dw_hdmi->hdmitx_ctrl	0,4096-u64max
PARAM_VALUE	0	dw_hdmi->hdmitx_ctrl->array	0-1
PARAM_VALUE	0	dw_hdmi->hdmitx_phy	0,4096-u64max
PARAM_VALUE	0	dw_hdmi->hdmitx_phy->array	0-1
PARAM_VALUE	0	dw_hdmi->priv	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->priv->hhi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->priv->hhi->async	0
PARAM_VALUE	1	addr	6
PARAM_VALUE	2	data	4096
BUF_SIZE	0	dw_hdmi	s32min-(-2),1-s32max
BUF_SIZE	0	dw_hdmi	s32min-(-2),1-s32max
BUF_SIZE	0	dw_hdmi->hdmitx_apb	(-1),8,280
BUF_SIZE	0	dw_hdmi->hdmitx_ctrl	(-1),8,280
BUF_SIZE	0	dw_hdmi->hdmitx_phy	(-1),8,280
BUF_SIZE	0	dw_hdmi->priv	s32min-(-1),1-s32max
DATA_SOURCE	0	dw_hdmi	$0
CONTAINER	0	-8-168+0	$(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/meson/meson_dw_hdmi.c meson_dw_hdmi_init() -> (struct meson_dw_hdmi_data)->top_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	dw_hdmi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->data	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->hdmitx_apb	0,4096-u64max
PARAM_VALUE	0	dw_hdmi->hdmitx_apb->array	0-1
PARAM_VALUE	0	dw_hdmi->hdmitx_ctrl	0,4096-u64max
PARAM_VALUE	0	dw_hdmi->hdmitx_ctrl->array	0-1
PARAM_VALUE	0	dw_hdmi->hdmitx_phy	0,4096-u64max
PARAM_VALUE	0	dw_hdmi->hdmitx_phy->array	0-1
PARAM_VALUE	0	dw_hdmi->priv	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->priv->hhi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->priv->hhi->async	0
PARAM_VALUE	1	addr	5
PARAM_VALUE	2	data	1
BUF_SIZE	0	dw_hdmi	s32min-(-2),1-s32max
BUF_SIZE	0	dw_hdmi	s32min-(-2),1-s32max
BUF_SIZE	0	dw_hdmi->hdmitx_apb	(-1),8,280
BUF_SIZE	0	dw_hdmi->hdmitx_ctrl	(-1),8,280
BUF_SIZE	0	dw_hdmi->hdmitx_phy	(-1),8,280
BUF_SIZE	0	dw_hdmi->priv	s32min-(-1),1-s32max
DATA_SOURCE	0	dw_hdmi	$0
CONTAINER	0	-8-168+0	$(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/meson/meson_dw_hdmi.c meson_dw_hdmi_init() -> (struct meson_dw_hdmi_data)->top_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	dw_hdmi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->data	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->hdmitx_apb	0,4096-u64max
PARAM_VALUE	0	dw_hdmi->hdmitx_apb->array	0-1
PARAM_VALUE	0	dw_hdmi->hdmitx_ctrl	0,4096-u64max
PARAM_VALUE	0	dw_hdmi->hdmitx_ctrl->array	0-1
PARAM_VALUE	0	dw_hdmi->hdmitx_phy	0,4096-u64max
PARAM_VALUE	0	dw_hdmi->hdmitx_phy->array	0-1
PARAM_VALUE	0	dw_hdmi->priv	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->priv->hhi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->priv->hhi->async	0
PARAM_VALUE	1	addr	3
PARAM_VALUE	2	data	1
BUF_SIZE	0	dw_hdmi	s32min-(-2),1-s32max
BUF_SIZE	0	dw_hdmi	s32min-(-2),1-s32max
BUF_SIZE	0	dw_hdmi->hdmitx_apb	(-1),8,280
BUF_SIZE	0	dw_hdmi->hdmitx_ctrl	(-1),8,280
BUF_SIZE	0	dw_hdmi->hdmitx_phy	(-1),8,280
BUF_SIZE	0	dw_hdmi->priv	s32min-(-1),1-s32max
DATA_SOURCE	0	dw_hdmi	$0
CONTAINER	0	-8-168+0	$(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/meson/meson_dw_hdmi.c meson_dw_hdmi_pm_suspend() -> (struct meson_dw_hdmi_data)->top_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	dw_hdmi	4096-ptr_max
PARAM_VALUE	0	dw_hdmi->data	4096-ptr_max
PARAM_VALUE	1	addr	0
PARAM_VALUE	2	data	0
BUF_SIZE	0	dw_hdmi	s32min-(-2),1-s32max
BUF_SIZE	0	dw_hdmi	s32min-(-2),1-s32max
CONTAINER	0	-8-168+0	$(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL