Defined in 1 files as a member:
Defined in 7 files as a function:
- drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c, line 339 (as a function)
- drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c, line 77 (as a function)
- drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c, line 37 (as a function)
- drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c, line 77 (as a function)
- drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c, line 37 (as a function)
- drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c, line 43 (as a function)
- drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c, line 37 (as a function)
Referenced in 11 files:
- drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c, line 450
- drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c, line 419
- drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c
- drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c
- drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c
- drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c
- drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c
- drivers/crypto/intel/qat/qat_common/adf_common_drv.h, line 237
- drivers/crypto/intel/qat/qat_common/adf_vf_isr.c, line 138
- drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
- drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c
Smatch caller information:
drivers/crypto/intel/qat/qat_common/adf_rl.c adf_get_pmisc_base() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| PARAM_VALUE | 0 | self->anti_rb_data.anti_rb_enabled | 0,2783640489427247104 |
| PARAM_VALUE | 0 | self->anti_rb_data.svncheck_offset | 0,6553604 |
| PARAM_VALUE | 0 | self->dc_ops.build_comp_block | 0,587787276729257984,5077623571692773376,6924550329891028992 |
| PARAM_VALUE | 0 | self->dc_ops.build_decomp_block | 0,503440895821680640,6089418188964384768,8233123251932655616 |
| PARAM_VALUE | 0 | self->kpt_data.max_swk_cnt_per_fn_pasid | 0,128 |
| PARAM_VALUE | 0 | self->kpt_data.max_swk_ttl | 0,31536000 |
| PARAM_VALUE | 0 | self->kpt_data.user_input.swk_cnt_per_fn | 0-128 |
| PARAM_VALUE | 0 | self->kpt_data.user_input.swk_cnt_per_pasid | 0-128 |
| PARAM_VALUE | 0 | self->kpt_data.user_input.swk_max_ttl | 0-31536000 |
| PARAM_VALUE | 0 | self->ras_ops.disable_ras_errors | 0,2941263087551238144,5188837701237006336 |
| PARAM_VALUE | 0 | self->ras_ops.enable_ras_errors | 0,565749205621829632,3768209244441145344 |
| PARAM_VALUE | 0 | self->ras_ops.handle_interrupt | 0,1117794510123765760,4860903860365004800 |
| PARAM_VALUE | 0 | self->rl_data.c2s_offset | 0,5277720 |
| PARAM_VALUE | 0 | self->rl_data.dcpr_correction | 0-1 |
| PARAM_VALUE | 0 | self->rl_data.l2c_offset | 0,5279744 |
| PARAM_VALUE | 0 | self->rl_data.pcie_scale_div | 0,100 |
| PARAM_VALUE | 0 | self->rl_data.pcie_scale_mul | 0,102 |
| PARAM_VALUE | 0 | self->rl_data.pciin_tb_offset | 0,5277696 |
| PARAM_VALUE | 0 | self->rl_data.pciout_tb_offset | 0,5277700 |
| PARAM_VALUE | 0 | self->rl_data.r2l_offset | 0,5275648 |
| PARAM_VALUE | 0 | self->rl_data.scale_ref | 0,1000 |
| PARAM_VALUE | 0 | self->rl_data.scan_interval | 0,954 |
| PARAM_VALUE | 0 | self->tl_data.bw_units_to_bytes | 0,64 |
| PARAM_VALUE | 0 | self->tl_data.cmdq_counters | 0,8659389840629915648 |
| PARAM_VALUE | 0 | self->tl_data.cmdq_reg_sz | 0,16 |
| PARAM_VALUE | 0 | self->tl_data.cpp_ns_per_cycle | 0,2 |
| PARAM_VALUE | 0 | self->tl_data.dev_counters | 0,1387861499208638464,9198863888897146880 |
| PARAM_VALUE | 0 | self->tl_data.layout_sz | 0,2048,3016 |
| PARAM_VALUE | 0 | self->tl_data.max_rp | 0,4 |
| PARAM_VALUE | 0 | self->tl_data.max_sl_cnt | 0,24,32 |
| PARAM_VALUE | 0 | self->tl_data.msg_cnt_off | 0,2040,3008 |
| PARAM_VALUE | 0 | self->tl_data.num_cmdq_counters | 0,3 |
| PARAM_VALUE | 0 | self->tl_data.num_dev_counters | 0,10-11 |
| PARAM_VALUE | 0 | self->tl_data.num_hbuff | 0,4 |
| PARAM_VALUE | 0 | self->tl_data.num_rp_counters | 0,8-9 |
| PARAM_VALUE | 0 | self->tl_data.rp_counters | 0,903728281882165248,5399360698341208064 |
| PARAM_VALUE | 0 | self->tl_data.rp_reg_sz | 0,56 |
| PARAM_VALUE | 0 | self->tl_data.sl_exec_counters | 0,4458312239910236160,7952220536975212544 |
| PARAM_VALUE | 0 | self->tl_data.sl_util_counters | 0,2264477436775256064,2993218131298308096 |
| PARAM_VALUE | 0 | self->tl_data.slice_reg_sz | 0,8 |
| BUF_SIZE | 0 | self | (-1),1280 |
| BUF_SIZE | 0 | self | (-1),1280 |
| CONTAINER | 0 | -40+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &accel_dev->state_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &rl_data->rl_lock |
drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.c adf_get_pmisc_base() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| PARAM_VALUE | 0 | self->anti_rb_data.anti_rb_enabled | 0,2783640489427247104 |
| PARAM_VALUE | 0 | self->anti_rb_data.svncheck_offset | 0,6553604 |
| PARAM_VALUE | 0 | self->dc_ops.build_comp_block | 0,587787276729257984,5077623571692773376,6924550329891028992 |
| PARAM_VALUE | 0 | self->dc_ops.build_decomp_block | 0,503440895821680640,6089418188964384768,8233123251932655616 |
| PARAM_VALUE | 0 | self->kpt_data.max_swk_cnt_per_fn_pasid | 0,128 |
| PARAM_VALUE | 0 | self->kpt_data.max_swk_ttl | 0,31536000 |
| PARAM_VALUE | 0 | self->ras_ops.disable_ras_errors | 0,2941263087551238144,5188837701237006336 |
| PARAM_VALUE | 0 | self->ras_ops.enable_ras_errors | 0,565749205621829632,3768209244441145344 |
| PARAM_VALUE | 0 | self->ras_ops.handle_interrupt | 0,1117794510123765760,4860903860365004800 |
| PARAM_VALUE | 0 | self->rl_data.c2s_offset | 0,5277720 |
| PARAM_VALUE | 0 | self->rl_data.dcpr_correction | 0-1 |
| PARAM_VALUE | 0 | self->rl_data.l2c_offset | 0,5279744 |
| PARAM_VALUE | 0 | self->rl_data.pcie_scale_div | 0,100 |
| PARAM_VALUE | 0 | self->rl_data.pcie_scale_mul | 0,102 |
| PARAM_VALUE | 0 | self->rl_data.pciin_tb_offset | 0,5277696 |
| PARAM_VALUE | 0 | self->rl_data.pciout_tb_offset | 0,5277700 |
| PARAM_VALUE | 0 | self->rl_data.r2l_offset | 0,5275648 |
| PARAM_VALUE | 0 | self->rl_data.scale_ref | 0,1000 |
| PARAM_VALUE | 0 | self->rl_data.scan_interval | 0,954 |
| PARAM_VALUE | 0 | self->tl_data.bw_units_to_bytes | 0,64 |
| PARAM_VALUE | 0 | self->tl_data.cmdq_counters | 0,8659389840629915648 |
| PARAM_VALUE | 0 | self->tl_data.cmdq_reg_sz | 0,16 |
| PARAM_VALUE | 0 | self->tl_data.cpp_ns_per_cycle | 0,2 |
| PARAM_VALUE | 0 | self->tl_data.dev_counters | 0,1387861499208638464,9198863888897146880 |
| PARAM_VALUE | 0 | self->tl_data.layout_sz | 0,2048,3016 |
| PARAM_VALUE | 0 | self->tl_data.max_rp | 0,4 |
| PARAM_VALUE | 0 | self->tl_data.max_sl_cnt | 0,24,32 |
| PARAM_VALUE | 0 | self->tl_data.msg_cnt_off | 0,2040,3008 |
| PARAM_VALUE | 0 | self->tl_data.num_cmdq_counters | 0,3 |
| PARAM_VALUE | 0 | self->tl_data.num_dev_counters | 0,10-11 |
| PARAM_VALUE | 0 | self->tl_data.num_hbuff | 0,4 |
| PARAM_VALUE | 0 | self->tl_data.num_rp_counters | 0,8-9 |
| PARAM_VALUE | 0 | self->tl_data.rp_counters | 0,903728281882165248,5399360698341208064 |
| PARAM_VALUE | 0 | self->tl_data.rp_reg_sz | 0,56 |
| PARAM_VALUE | 0 | self->tl_data.sl_exec_counters | 0,4458312239910236160,7952220536975212544 |
| PARAM_VALUE | 0 | self->tl_data.sl_util_counters | 0,2264477436775256064,2993218131298308096 |
| PARAM_VALUE | 0 | self->tl_data.slice_reg_sz | 0,8 |
| BUF_SIZE | 0 | self | (-1),1280 |
| BUF_SIZE | 0 | self | (-1),1280 |
| CONTAINER | 0 | -40+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &accel_dev->state_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pdev->dev.mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | global &pci_rescan_remove_lock |
drivers/crypto/intel/qat/qat_common/adf_anti_rb.c adf_get_pmisc_base() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| PARAM_VALUE | 0 | self->anti_rb_data.anti_rb_enabled | 1-u64max |
| PARAM_VALUE | 0 | self->anti_rb_data.svncheck_offset | 0,6553604 |
| PARAM_VALUE | 0 | self->kpt_data.max_swk_cnt_per_fn_pasid | 0,128 |
| PARAM_VALUE | 0 | self->kpt_data.max_swk_ttl | 0,31536000 |
| PARAM_VALUE | 0 | self->kpt_data.user_input.swk_cnt_per_fn | 0-128 |
| PARAM_VALUE | 0 | self->kpt_data.user_input.swk_cnt_per_pasid | 0-128 |
| PARAM_VALUE | 0 | self->kpt_data.user_input.swk_max_ttl | 0-31536000 |
| PARAM_VALUE | 0 | self->rl_data.c2s_offset | 0,5277720 |
| PARAM_VALUE | 0 | self->rl_data.dcpr_correction | 0-1 |
| PARAM_VALUE | 0 | self->rl_data.l2c_offset | 0,5279744 |
| PARAM_VALUE | 0 | self->rl_data.pcie_scale_div | 0,100 |
| PARAM_VALUE | 0 | self->rl_data.pcie_scale_mul | 0,102 |
| PARAM_VALUE | 0 | self->rl_data.pciin_tb_offset | 0,5277696 |
| PARAM_VALUE | 0 | self->rl_data.pciout_tb_offset | 0,5277700 |
| PARAM_VALUE | 0 | self->rl_data.r2l_offset | 0,5275648 |
| PARAM_VALUE | 0 | self->rl_data.scale_ref | 0,1000 |
| PARAM_VALUE | 0 | self->rl_data.scan_interval | 0,954 |
| PARAM_VALUE | 0 | self->tl_data.bw_units_to_bytes | 0,64 |
| PARAM_VALUE | 0 | self->tl_data.cmdq_reg_sz | 0,16 |
| PARAM_VALUE | 0 | self->tl_data.cpp_ns_per_cycle | 0,2 |
| PARAM_VALUE | 0 | self->tl_data.layout_sz | 0,2048,3016 |
| PARAM_VALUE | 0 | self->tl_data.max_rp | 0,4 |
| PARAM_VALUE | 0 | self->tl_data.max_sl_cnt | 0,24,32 |
| PARAM_VALUE | 0 | self->tl_data.msg_cnt_off | 0,2040,3008 |
| PARAM_VALUE | 0 | self->tl_data.num_cmdq_counters | 0,3 |
| PARAM_VALUE | 0 | self->tl_data.num_dev_counters | 0,10-11 |
| PARAM_VALUE | 0 | self->tl_data.num_hbuff | 0,4 |
| PARAM_VALUE | 0 | self->tl_data.num_rp_counters | 0,8-9 |
| PARAM_VALUE | 0 | self->tl_data.rp_reg_sz | 0,56 |
| PARAM_VALUE | 0 | self->tl_data.slice_reg_sz | 0,8 |
| CONTAINER | 0 | -40+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &accel_dev->state_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pdev->dev.mutex | ||
| HALF_LOCKED2 | global &pci_rescan_remove_lock | ||
| TYPE_LOCK | (struct adf_accel_dev)->state_lock |
drivers/crypto/intel/qat/qat_common/adf_gen6_ras.c adf_get_pmisc_base() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| PARAM_VALUE | 0 | self->ras_ops.handle_interrupt | 0,1117794510123765760,4860903860365004800 |
| BUF_SIZE | 0 | self | (-1),1280 |
| BUF_SIZE | 0 | self | (-1),1280 |
| CONTAINER | 0 | -40+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &accel_dev->state_lock |
drivers/crypto/intel/qat/qat_common/adf_gen4_vf_mig.c adf_get_pmisc_base() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| CONTAINER | 0 | -40+0 | $(-1) |
| LOCK2 | &qat_vdev->state_mutex | ||
| TYPE_LOCK | (struct qat_vf_core_device)->state_mutex |
drivers/crypto/intel/qat/qat_common/adf_gen4_ras.c adf_get_pmisc_base() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| PARAM_VALUE | 0 | self->get_sram_bar_id | 4096-ptr_max |
| PARAM_VALUE | 0 | self->ras_ops.handle_interrupt | 0,1117794510123765760,4860903860365004800 |
| BUF_SIZE | 0 | self | (-1),1280 |
| BUF_SIZE | 0 | self | (-1),1280 |
| CONTAINER | 0 | -40+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &accel_dev->state_lock |
drivers/crypto/intel/qat/qat_common/adf_gen2_pfvf.c adf_get_pmisc_base() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| BUF_SIZE | 0 | self | (-1),1280 |
| BUF_SIZE | 0 | self | (-1),1280 |
| CONTAINER | 0 | -40+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &pool->lock |
drivers/crypto/intel/qat/qat_common/qat_hal.c adf_get_pmisc_base() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| PARAM_VALUE | 0 | self->anti_rb_data.anti_rb_enabled | 0,2783640489427247104 |
| PARAM_VALUE | 0 | self->anti_rb_data.svncheck_offset | 0,6553604 |
| PARAM_VALUE | 0 | self->dc_ops.build_comp_block | 0,587787276729257984,5077623571692773376,6924550329891028992 |
| PARAM_VALUE | 0 | self->dc_ops.build_decomp_block | 0,503440895821680640,6089418188964384768,8233123251932655616 |
| PARAM_VALUE | 0 | self->fw_name | 1-u64max |
| PARAM_VALUE | 0 | self->kpt_data.max_swk_cnt_per_fn_pasid | 0,128 |
| PARAM_VALUE | 0 | self->kpt_data.max_swk_ttl | 0,31536000 |
| PARAM_VALUE | 0 | self->kpt_data.user_input.swk_cnt_per_fn | 0-128 |
| PARAM_VALUE | 0 | self->kpt_data.user_input.swk_cnt_per_pasid | 0-128 |
| PARAM_VALUE | 0 | self->kpt_data.user_input.swk_max_ttl | 0-31536000 |
| PARAM_VALUE | 0 | self->ras_ops.disable_ras_errors | 0,2941263087551238144,5188837701237006336 |
| PARAM_VALUE | 0 | self->ras_ops.enable_ras_errors | 0,565749205621829632,3768209244441145344 |
| PARAM_VALUE | 0 | self->ras_ops.handle_interrupt | 0,1117794510123765760,4860903860365004800 |
| PARAM_VALUE | 0 | self->rl_data.c2s_offset | 0,5277720 |
| PARAM_VALUE | 0 | self->rl_data.dcpr_correction | 0-1 |
| PARAM_VALUE | 0 | self->rl_data.l2c_offset | 0,5279744 |
| PARAM_VALUE | 0 | self->rl_data.pcie_scale_div | 0,100 |
| PARAM_VALUE | 0 | self->rl_data.pcie_scale_mul | 0,102 |
| PARAM_VALUE | 0 | self->rl_data.pciin_tb_offset | 0,5277696 |
| PARAM_VALUE | 0 | self->rl_data.pciout_tb_offset | 0,5277700 |
| PARAM_VALUE | 0 | self->rl_data.r2l_offset | 0,5275648 |
| PARAM_VALUE | 0 | self->rl_data.scale_ref | 0,1000 |
| PARAM_VALUE | 0 | self->rl_data.scan_interval | 0,954 |
| PARAM_VALUE | 0 | self->tl_data.bw_units_to_bytes | 0,64 |
| PARAM_VALUE | 0 | self->tl_data.cmdq_counters | 0,8659389840629915648 |
| PARAM_VALUE | 0 | self->tl_data.cmdq_reg_sz | 0,16 |
| PARAM_VALUE | 0 | self->tl_data.cpp_ns_per_cycle | 0,2 |
| PARAM_VALUE | 0 | self->tl_data.dev_counters | 0,1387861499208638464,9198863888897146880 |
| PARAM_VALUE | 0 | self->tl_data.layout_sz | 0,2048,3016 |
| PARAM_VALUE | 0 | self->tl_data.max_rp | 0,4 |
| PARAM_VALUE | 0 | self->tl_data.max_sl_cnt | 0,24,32 |
| PARAM_VALUE | 0 | self->tl_data.msg_cnt_off | 0,2040,3008 |
| PARAM_VALUE | 0 | self->tl_data.num_cmdq_counters | 0,3 |
| PARAM_VALUE | 0 | self->tl_data.num_dev_counters | 0,10-11 |
| PARAM_VALUE | 0 | self->tl_data.num_hbuff | 0,4 |
| PARAM_VALUE | 0 | self->tl_data.num_rp_counters | 0,8-9 |
| PARAM_VALUE | 0 | self->tl_data.rp_counters | 0,903728281882165248,5399360698341208064 |
| PARAM_VALUE | 0 | self->tl_data.rp_reg_sz | 0,56 |
| PARAM_VALUE | 0 | self->tl_data.sl_exec_counters | 0,4458312239910236160,7952220536975212544 |
| PARAM_VALUE | 0 | self->tl_data.sl_util_counters | 0,2264477436775256064,2993218131298308096 |
| PARAM_VALUE | 0 | self->tl_data.slice_reg_sz | 0,8 |
| BUF_SIZE | 0 | self | (-1),1280 |
| BUF_SIZE | 0 | self | (-1),1280 |
| CONTAINER | 0 | -40+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &accel_dev->state_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pdev->dev.mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | global &pci_rescan_remove_lock | ||
| TYPE_LOCK | (struct adf_accel_dev)->state_lock |
drivers/crypto/intel/qat/qat_common/adf_gen4_pm.c adf_get_pmisc_base() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| BUF_SIZE | 0 | self | (-1),1280 |
| BUF_SIZE | 0 | self | (-1),1280 |
| CONTAINER | 0 | -40+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &accel_dev->state_lock |
drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.c adf_get_pmisc_base() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| BUF_SIZE | 0 | self | (-1),1280 |
| BUF_SIZE | 0 | self | (-1),1280 |
| CONTAINER | 0 | -40+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &pool->lock |
drivers/crypto/intel/qat/qat_common/adf_admin.c adf_get_pmisc_base() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| PARAM_VALUE | 0 | self->anti_rb_data.anti_rb_enabled | 0,2783640489427247104 |
| PARAM_VALUE | 0 | self->anti_rb_data.svncheck_offset | 0,6553604 |
| PARAM_VALUE | 0 | self->dc_ops.build_comp_block | 0,587787276729257984,5077623571692773376,6924550329891028992 |
| PARAM_VALUE | 0 | self->dc_ops.build_decomp_block | 0,503440895821680640,6089418188964384768,8233123251932655616 |
| PARAM_VALUE | 0 | self->init_admin_comms | 1-u64max |
| PARAM_VALUE | 0 | self->kpt_data.max_swk_cnt_per_fn_pasid | 0,128 |
| PARAM_VALUE | 0 | self->kpt_data.max_swk_ttl | 0,31536000 |
| PARAM_VALUE | 0 | self->kpt_data.user_input.swk_cnt_per_fn | 0-128 |
| PARAM_VALUE | 0 | self->kpt_data.user_input.swk_cnt_per_pasid | 0-128 |
| PARAM_VALUE | 0 | self->kpt_data.user_input.swk_max_ttl | 0-31536000 |
| PARAM_VALUE | 0 | self->ras_ops.disable_ras_errors | 0,2941263087551238144,5188837701237006336 |
| PARAM_VALUE | 0 | self->ras_ops.enable_ras_errors | 0,565749205621829632,3768209244441145344 |
| PARAM_VALUE | 0 | self->ras_ops.handle_interrupt | 0,1117794510123765760,4860903860365004800 |
| PARAM_VALUE | 0 | self->rl_data.c2s_offset | 0,5277720 |
| PARAM_VALUE | 0 | self->rl_data.dcpr_correction | 0-1 |
| PARAM_VALUE | 0 | self->rl_data.l2c_offset | 0,5279744 |
| PARAM_VALUE | 0 | self->rl_data.pcie_scale_div | 0,100 |
| PARAM_VALUE | 0 | self->rl_data.pcie_scale_mul | 0,102 |
| PARAM_VALUE | 0 | self->rl_data.pciin_tb_offset | 0,5277696 |
| PARAM_VALUE | 0 | self->rl_data.pciout_tb_offset | 0,5277700 |
| PARAM_VALUE | 0 | self->rl_data.r2l_offset | 0,5275648 |
| PARAM_VALUE | 0 | self->rl_data.scale_ref | 0,1000 |
| PARAM_VALUE | 0 | self->rl_data.scan_interval | 0,954 |
| PARAM_VALUE | 0 | self->tl_data.bw_units_to_bytes | 0,64 |
| PARAM_VALUE | 0 | self->tl_data.cmdq_counters | 0,8659389840629915648 |
| PARAM_VALUE | 0 | self->tl_data.cmdq_reg_sz | 0,16 |
| PARAM_VALUE | 0 | self->tl_data.cpp_ns_per_cycle | 0,2 |
| PARAM_VALUE | 0 | self->tl_data.dev_counters | 0,1387861499208638464,9198863888897146880 |
| PARAM_VALUE | 0 | self->tl_data.layout_sz | 0,2048,3016 |
| PARAM_VALUE | 0 | self->tl_data.max_rp | 0,4 |
| PARAM_VALUE | 0 | self->tl_data.max_sl_cnt | 0,24,32 |
| PARAM_VALUE | 0 | self->tl_data.msg_cnt_off | 0,2040,3008 |
| PARAM_VALUE | 0 | self->tl_data.num_cmdq_counters | 0,3 |
| PARAM_VALUE | 0 | self->tl_data.num_dev_counters | 0,10-11 |
| PARAM_VALUE | 0 | self->tl_data.num_hbuff | 0,4 |
| PARAM_VALUE | 0 | self->tl_data.num_rp_counters | 0,8-9 |
| PARAM_VALUE | 0 | self->tl_data.rp_counters | 0,903728281882165248,5399360698341208064 |
| PARAM_VALUE | 0 | self->tl_data.rp_reg_sz | 0,56 |
| PARAM_VALUE | 0 | self->tl_data.sl_exec_counters | 0,4458312239910236160,7952220536975212544 |
| PARAM_VALUE | 0 | self->tl_data.sl_util_counters | 0,2264477436775256064,2993218131298308096 |
| PARAM_VALUE | 0 | self->tl_data.slice_reg_sz | 0,8 |
| BUF_SIZE | 0 | self | (-1),1280 |
| BUF_SIZE | 0 | self | (-1),1280 |
| CONTAINER | 0 | -40+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &accel_dev->state_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pdev->dev.mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | global &pci_rescan_remove_lock | ||
| TYPE_LOCK | (struct adf_accel_dev)->state_lock |
drivers/crypto/intel/qat/qat_common/adf_vf_isr.c adf_get_pmisc_base() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| BUF_SIZE | 0 | self | (-1),1280 |
| BUF_SIZE | 0 | self | (-1),1280 |
| CONTAINER | 0 | -40+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/crypto/intel/qat/qat_common/adf_vf_isr.c adf_isr() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| CONTAINER | 0 | -40+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &desc->request_mutex | ||
| HALF_LOCKED2 | flags |
drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c adf_get_pmisc_base() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| CONTAINER | 0 | -40+0 | $(-1) |
drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c adf_get_pmisc_base() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| BUF_SIZE | 0 | self | (-1),1280 |
| BUF_SIZE | 0 | self | (-1),1280 |
| CONTAINER | 0 | -40+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &accel_dev->state_lock | ||
| HALF_LOCKED2 | &qat_vdev->state_mutex |
drivers/crypto/intel/qat/qat_common/adf_isr.c adf_get_pmisc_base() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| BUF_SIZE | 0 | self | (-1),1280 |
| BUF_SIZE | 0 | self | (-1),1280 |
| CONTAINER | 0 | -40+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &vf_info->pfvf_mig_lock |
drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c adf_get_pmisc_base() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| PARAM_VALUE | 0 | self->anti_rb_data.anti_rb_enabled | 0,2783640489427247104 |
| PARAM_VALUE | 0 | self->anti_rb_data.svncheck_offset | 0,6553604 |
| PARAM_VALUE | 0 | self->dc_ops.build_comp_block | 0,587787276729257984,5077623571692773376,6924550329891028992 |
| PARAM_VALUE | 0 | self->dc_ops.build_decomp_block | 0,503440895821680640,6089418188964384768,8233123251932655616 |
| PARAM_VALUE | 0 | self->kpt_data.max_swk_cnt_per_fn_pasid | 0,128 |
| PARAM_VALUE | 0 | self->kpt_data.max_swk_ttl | 0,31536000 |
| PARAM_VALUE | 0 | self->kpt_data.user_input.swk_cnt_per_fn | 0-128 |
| PARAM_VALUE | 0 | self->kpt_data.user_input.swk_cnt_per_pasid | 0-128 |
| PARAM_VALUE | 0 | self->kpt_data.user_input.swk_max_ttl | 0-31536000 |
| PARAM_VALUE | 0 | self->ras_ops.disable_ras_errors | 0,2941263087551238144,5188837701237006336 |
| PARAM_VALUE | 0 | self->ras_ops.enable_ras_errors | 0,565749205621829632,3768209244441145344 |
| PARAM_VALUE | 0 | self->ras_ops.handle_interrupt | 0,1117794510123765760,4860903860365004800 |
| PARAM_VALUE | 0 | self->rl_data.c2s_offset | 0,5277720 |
| PARAM_VALUE | 0 | self->rl_data.dcpr_correction | 0-1 |
| PARAM_VALUE | 0 | self->rl_data.l2c_offset | 0,5279744 |
| PARAM_VALUE | 0 | self->rl_data.pcie_scale_div | 0,100 |
| PARAM_VALUE | 0 | self->rl_data.pcie_scale_mul | 0,102 |
| PARAM_VALUE | 0 | self->rl_data.pciin_tb_offset | 0,5277696 |
| PARAM_VALUE | 0 | self->rl_data.pciout_tb_offset | 0,5277700 |
| PARAM_VALUE | 0 | self->rl_data.r2l_offset | 0,5275648 |
| PARAM_VALUE | 0 | self->rl_data.scale_ref | 0,1000 |
| PARAM_VALUE | 0 | self->rl_data.scan_interval | 0,954 |
| PARAM_VALUE | 0 | self->tl_data.bw_units_to_bytes | 0,64 |
| PARAM_VALUE | 0 | self->tl_data.cmdq_counters | 0,8659389840629915648 |
| PARAM_VALUE | 0 | self->tl_data.cmdq_reg_sz | 0,16 |
| PARAM_VALUE | 0 | self->tl_data.cpp_ns_per_cycle | 0,2 |
| PARAM_VALUE | 0 | self->tl_data.dev_counters | 0,1387861499208638464,9198863888897146880 |
| PARAM_VALUE | 0 | self->tl_data.layout_sz | 0,2048,3016 |
| PARAM_VALUE | 0 | self->tl_data.max_rp | 0,4 |
| PARAM_VALUE | 0 | self->tl_data.max_sl_cnt | 0,24,32 |
| PARAM_VALUE | 0 | self->tl_data.msg_cnt_off | 0,2040,3008 |
| PARAM_VALUE | 0 | self->tl_data.num_cmdq_counters | 0,3 |
| PARAM_VALUE | 0 | self->tl_data.num_dev_counters | 0,10-11 |
| PARAM_VALUE | 0 | self->tl_data.num_hbuff | 0,4 |
| PARAM_VALUE | 0 | self->tl_data.num_rp_counters | 0,8-9 |
| PARAM_VALUE | 0 | self->tl_data.rp_counters | 0,903728281882165248,5399360698341208064 |
| PARAM_VALUE | 0 | self->tl_data.rp_reg_sz | 0,56 |
| PARAM_VALUE | 0 | self->tl_data.sl_exec_counters | 0,4458312239910236160,7952220536975212544 |
| PARAM_VALUE | 0 | self->tl_data.sl_util_counters | 0,2264477436775256064,2993218131298308096 |
| PARAM_VALUE | 0 | self->tl_data.slice_reg_sz | 0,8 |
| BUF_SIZE | 0 | self | (-1),1280 |
| BUF_SIZE | 0 | self | (-1),1280 |
| CONTAINER | 0 | -40+0 | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &accel_dev->state_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pdev->dev.mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | global &pci_rescan_remove_lock | ||
| TYPE_LOCK | (struct adf_accel_dev)->state_lock |
drivers/crypto/intel/qat/qat_common/adf_gen6_pm_dbgfs.c adf_get_pmisc_base() -> (struct adf_hw_device_data)->get_misc_bar_id()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | self | 4096-ptr_max |
| CONTAINER | 0 | -40+0 | $(-1) |