Documented in 1 files:

Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 2 files:

Smatch caller information:

drivers/gpu/drm/i915/i915_vma.c vma_create() -> i915_gem_fence_alignment()

Type Parameter Key Value
PARAM_VALUE 2 tiling 0-127
PARAM_VALUE 3 stride 0,128-u32max
CAPPED_DATA 1 size 1
BIT_INFO 2 tiling 0x0,0x7f
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 1 size
UNITS 1 size unit_byte
LOCK2 &obj->vma.lock
LOCK2 &vm->mutex
HALF_LOCKED2 &ce->pin_mutex
HALF_LOCKED2 &ctx->engines_mutex
HALF_LOCKED2 &display->hdcp.hdcp_mutex
HALF_LOCKED2 &gt->perf.lock
HALF_LOCKED2 __flags
HALF_LOCKED2 obj->base.resv
TYPE_LOCK (struct drm_i915_gem_object)->vma.lock
TYPE_LOCK (struct i915_address_space)->mutex

drivers/gpu/drm/i915/gem/i915_gem_tiling.c i915_gem_object_set_tiling() -> i915_gem_fence_alignment()

Type Parameter Key Value
PARAM_VALUE 0 i915 4096-ptr_max
DATA_SOURCE 0 i915 r to_i915
DATA_SOURCE 2 tiling $1
DATA_SOURCE 3 stride $2
PREEMPT_ADD <- disables preempt
USER_DATA 2 tiling 0,2[u]
USER_DATA 3 stride 1-8192[u]
LOCK2 &obj->vma.lock
LOCK2 obj->base.resv
TYPE_LOCK (struct drm_i915_gem_object)->vma.lock

drivers/gpu/drm/i915/gem/i915_gem_tiling.c i915_vma_fence_prepare() -> i915_gem_fence_alignment()

Type Parameter Key Value
PARAM_VALUE 2 tiling 1-u32max
DATA_SOURCE 2 tiling $1
DATA_SOURCE 3 stride $2
PREEMPT_ADD
USER_DATA 2 tiling 2[u]
USER_DATA 3 stride 1-8192[u]
LOCK2 &ggtt->vm.mutex
LOCK2 &obj->vma.lock
LOCK2 obj->base.resv
TYPE_LOCK (struct drm_i915_gem_object)->vma.lock
TYPE_LOCK (struct i915_address_space)->mutex