| PARAM_VALUE |
0 |
display |
4096-ptr_max |
| PARAM_VALUE |
0 |
display->dpll.lock.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
display->dpll.lock.first_waiter |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
display->dpll.lock.first_waiter->list.prev->next |
5159360019465732096 |
| PARAM_VALUE |
0 |
display->dpll.lock.first_waiter->list.prev->prev |
5159360019465732096 |
| PARAM_VALUE |
0 |
display->dpll.lock.osq.tail.counter |
0-s32max |
| PARAM_VALUE |
0 |
display->dpll.lock.wait_lock.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
display->dpll.lock.wait_lock.owner |
(-1) |
| PARAM_VALUE |
0 |
display->dpll.lock.wait_lock.owner_cpu |
u32max |
| PARAM_VALUE |
0 |
display->drm |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
*display->irq.pipestat_irq_mask |
0-4294967295 |
| DATA_SOURCE |
0 |
display |
$0 |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| NOCHECK_CALL |
|
|
|
| HOST_DATA |
0 |
display->power.domains.dc_state |
0-u32max |
| LOCK2 |
0 |
&display->dpll.lock |
|
| HALF_LOCKED2 |
|
&pool->lock |
|
| TYPE_LOCK |
|
(struct intel_dpll_global)->lock |
|