| PARAM_VALUE |
0 |
vsi |
4096-ptr_max |
| PARAM_VALUE |
0 |
vsi->back |
4096-ptr_max |
| PARAM_VALUE |
0 |
vsi->type |
0-1,3-4,6,9 |
| BUF_SIZE |
0 |
vsi |
(-1)-0,4096 |
| BUF_SIZE |
0 |
vsi |
(-1)-0,4096 |
| DATA_SOURCE |
0 |
vsi |
$0 |
| NOSPEC |
0 |
vsi->alloc_txq |
|
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| NOCHECK_CALL |
|
|
|
| HOST_DATA |
0 |
vsi->back->avail_q_mutex.osq.tail.counter |
0-s32max |
| HOST_DATA |
0 |
vsi->back->avail_q_mutex.owner.counter |
s64min-s64max |
| HOST_DATA |
0 |
vsi->back->dplls.cgu_state_acq_err_num |
0 |
| HOST_DATA |
0 |
vsi->back->dplls.clock_id |
0[c] |
| HOST_DATA |
0 |
vsi->back->dplls.dpll_init.done |
0 |
| HOST_DATA |
0 |
vsi->back->dplls.dpll_init.wait.lock.magic |
3735899821 |
| HOST_DATA |
0 |
vsi->back->dplls.dpll_init.wait.lock.owner_cpu |
u32max |
| HOST_DATA |
0 |
vsi->back->dplls.dpll_init.wait.lock.raw_lock.locked |
0-255 |
| HOST_DATA |
0 |
vsi->back->dplls.dpll_init.wait.lock.raw_lock.locked_pending |
0-u16max |
| HOST_DATA |
0 |
vsi->back->dplls.dpll_init.wait.lock.raw_lock.pending |
0-255 |
| HOST_DATA |
0 |
vsi->back->dplls.dpll_init.wait.lock.raw_lock.tail |
0-u16max |
| HOST_DATA |
0 |
vsi->back->dplls.dpll_init.wait.lock.raw_lock.val.counter |
s32min-s32max |
| HOST_DATA |
0 |
vsi->back->dplls.eec.dpll_idx |
0-255 |
| HOST_DATA |
0 |
vsi->back->dplls.eec.dpll_state |
0-u32max |
| HOST_DATA |
0 |
vsi->back->dplls.eec.eec_mode |
0-255 |
| HOST_DATA |
0 |
vsi->back->dplls.eec.input_idx |
0-255 |
| HOST_DATA |
0 |
vsi->back->dplls.eec.phase_offset |
s64min-s64max |
| HOST_DATA |
0 |
vsi->back->dplls.eec.phase_offset_monitor_period |
0-u32max |
| HOST_DATA |
0 |
vsi->back->dplls.eec.prev_dpll_state |
0-u32max |
| HOST_DATA |
0 |
vsi->back->dplls.eec.prev_input_idx |
0-255 |
| HOST_DATA |
0 |
vsi->back->dplls.eec.prev_phase_offset |
s64min-s64max |
| HOST_DATA |
0 |
vsi->back->dplls.eec.ref_state |
0-255 |
| HOST_DATA |
0 |
vsi->back->dplls.generic |
0-1 |
| HOST_DATA |
0 |
vsi->back->dplls.periodic_counter |
0-u32max |
| HOST_DATA |
0 |
vsi->back->dplls.pps.dpll_idx |
0-255 |
| HOST_DATA |
0 |
vsi->back->dplls.pps.dpll_state |
0-u32max |
| HOST_DATA |
0 |
vsi->back->dplls.pps.eec_mode |
0-255 |
| HOST_DATA |
0 |
vsi->back->dplls.pps.input_idx |
0-255 |
| HOST_DATA |
0 |
vsi->back->dplls.pps.phase_offset |
s64min-s64max |
| HOST_DATA |
0 |
vsi->back->dplls.pps.phase_offset_monitor_period |
0-u32max |
| HOST_DATA |
0 |
vsi->back->dplls.pps.prev_dpll_state |
0-u32max |
| HOST_DATA |
0 |
vsi->back->dplls.pps.prev_input_idx |
0-255 |
| HOST_DATA |
0 |
vsi->back->dplls.pps.prev_phase_offset |
s64min-s64max |
| HOST_DATA |
0 |
vsi->back->dplls.pps.ref_state |
0-255 |
| HOST_DATA |
0 |
vsi->back->dplls.rclk.active |
0-1 |
| HOST_DATA |
0 |
vsi->back->dplls.rclk.direction |
0-u32max |
| HOST_DATA |
0 |
vsi->back->dplls.rclk.freq |
0-u32max |
| HOST_DATA |
0 |
vsi->back->dplls.rclk.hidden |
0-1 |
| HOST_DATA |
0 |
vsi->back->dplls.rclk.idx |
0-255 |
| HOST_DATA |
0 |
vsi->back->dplls.rclk.nb.priority |
s32min-s32max |
| HOST_DATA |
0 |
vsi->back->dplls.rclk.phase_adjust |
s32min-s32max |
| HOST_DATA |
0 |
vsi->back->dplls.rclk.phase_offset |
s64min-s64max |
| HOST_DATA |
0 |
vsi->back->dplls.rclk.prop.capabilities |
0-u64max |
| HOST_DATA |
0 |
vsi->back->dplls.rclk.prop.freq_supported_num |
0-u32max |
| HOST_DATA |
0 |
vsi->back->dplls.rclk.prop.phase_gran |
0-u32max |
| HOST_DATA |
0 |
vsi->back->dplls.rclk.prop.phase_range.max |
s32min-s32max |
| HOST_DATA |
0 |
vsi->back->dplls.rclk.prop.phase_range.min |
s32min-s32max |
| HOST_DATA |
0 |
vsi->back->dplls.rclk.prop.type |
0-u32max |
| HOST_DATA |
0 |
vsi->back->dplls.rclk.ref_sync |
0-255 |
| HOST_DATA |
0 |
vsi->back->dplls.rclk.status |
0-255 |
| HOST_DATA |
0 |
vsi->back->dplls.sma_data |
0-255 |
| HOST_DATA |
0 |
vsi->back->dplls.work.timer.expires |
0-u64max |
| HOST_DATA |
0 |
vsi->back->dplls.work.timer.flags |
0-u32max |
| HOST_DATA |
0 |
vsi->back->dplls.work.work.canceling |
s32min-s32max |
| HOST_DATA |
0 |
vsi->back->hw.active_pkg_in_nvm |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.active_pkg_ver.draft |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.active_pkg_ver.major |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.active_pkg_ver.minor |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.active_pkg_ver.update |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.active_track_id |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.num_rq_entries |
192 |
| HOST_DATA |
0 |
vsi->back->hw.adminq.num_sq_entries |
192 |
| HOST_DATA |
0 |
vsi->back->hw.adminq.qtype |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.rq.bah |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.rq.bal |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.rq.count |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.rq.desc_buf.pa |
0-u64max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.rq.desc_buf.size |
0-u64max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.rq.head |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.rq.head_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.rq.len |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.rq.len_crit_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.rq.len_ena_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.rq.len_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.rq.next_to_clean |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.rq.next_to_use |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.rq.tail |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.rq_buf_size |
4096 |
| HOST_DATA |
0 |
vsi->back->hw.adminq.rq_lock.osq.tail.counter |
s32min-s32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.rq_lock.owner.counter |
s64min-s64max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq.bah |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq.bal |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq.count |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq.desc_buf.pa |
0-u64max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq.desc_buf.size |
0-u64max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq.head |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq.head_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq.len |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq.len_crit_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq.len_ena_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq.len_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq.next_to_clean |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq.next_to_use |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq.tail |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq_buf_size |
4096 |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq_last_status |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq_lock.osq.tail.counter |
s32min-s32max |
| HOST_DATA |
0 |
vsi->back->hw.adminq.sq_lock.owner.counter |
s64min-s64max |
| HOST_DATA |
0 |
vsi->back->hw.api_branch |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.api_maj_ver |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.api_min_ver |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.api_patch |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.bus.device |
0-31 |
| HOST_DATA |
0 |
vsi->back->hw.bus.func |
0-7 |
| HOST_DATA |
0 |
vsi->back->hw.cgu_part_number |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.debug_mask |
0-u64max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.active_tc_bitmap |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.dcb |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.ieee_1588 |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.max_mtu |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.maxtc |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.msix_vector_first_id |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.num_msix_vectors |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.num_rxq |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.num_txq |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.nvm_unified_update |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.nvm_update_pending_netlist |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.nvm_update_pending_nvm |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.nvm_update_pending_orom |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.pcie_reset_avoidance |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.rdma |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.reset_restrict_support |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.roce_lag |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.rss_table_entry_width |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.rss_table_size |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.rxq_first_id |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.sr_iov_1_1 |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.sriov_aa_lag |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.sriov_lag |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.tx_sched_topo_comp_mode_en |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.txq_first_id |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.common_cap.valid_functions |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.nac_topo.id |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.nac_topo.mode |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.num_flow_director_fltr |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.num_funcs |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.num_vfs_exposed |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.num_vsi_allocd_to_host |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.supported_sensors |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.ts_dev_info.ena |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.ts_dev_info.ena_ports |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.ts_dev_info.ll_phy_tmr_update |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.ts_dev_info.tmr0_ena |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.ts_dev_info.tmr0_owned |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.ts_dev_info.tmr0_owner |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.ts_dev_info.tmr1_ena |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.ts_dev_info.tmr1_owned |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.ts_dev_info.tmr1_owner |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.ts_dev_info.tmr_own_map |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.ts_dev_info.ts_ll_int_read |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.dev_caps.ts_dev_info.ts_ll_read |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.device_id |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.dvm_ena |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.dvm_upd.count |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.evb_veb |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.fd_ctr_base |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.fdir_active_fltr |
s32min-s32max |
| HOST_DATA |
0 |
vsi->back->hw.fdir_fltr_lock.osq.tail.counter |
s32min-s32max |
| HOST_DATA |
0 |
vsi->back->hw.fdir_fltr_lock.owner.counter |
s64min-s64max |
| HOST_DATA |
0 |
vsi->back->hw.flash.banks.active_css_hdr_len |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.banks.inactive_css_hdr_len |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.banks.netlist_bank |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.banks.netlist_ptr |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.banks.netlist_size |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.banks.nvm_bank |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.banks.nvm_ptr |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.banks.nvm_size |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.banks.orom_bank |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.banks.orom_ptr |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.banks.orom_size |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.blank_nvm_mode |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.flash.flash_size |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.netlist.cust_ver |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.flash.netlist.hash |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.netlist.major |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.netlist.minor |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.netlist.rev |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.netlist.type |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.nvm.eetrack |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.flash.nvm.major |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.flash.nvm.minor |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.flash.orom.build |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.flash.orom.major |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.flash.orom.patch |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.flash.sr_words |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.flattened_layers |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.active_tc_bitmap |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.dcb |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.ieee_1588 |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.max_mtu |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.maxtc |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.msix_vector_first_id |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.num_msix_vectors |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.num_rxq |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.num_txq |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.nvm_unified_update |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.nvm_update_pending_netlist |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.nvm_update_pending_nvm |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.nvm_update_pending_orom |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.pcie_reset_avoidance |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.rdma |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.reset_restrict_support |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.roce_lag |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.rss_table_entry_width |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.rss_table_size |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.rxq_first_id |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.sr_iov_1_1 |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.sriov_aa_lag |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.sriov_lag |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.tx_sched_topo_comp_mode_en |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.txq_first_id |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.common_cap.valid_functions |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.fd_fltr_best_effort |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.fd_fltr_guar |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.guar_num_vsi |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.num_allocd_vfs |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.ts_func_info.clk_freq |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.ts_func_info.clk_src |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.ts_func_info.ena |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.ts_func_info.src_tmr_owned |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.ts_func_info.time_ref |
s32min-s32max |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.ts_func_info.tmr_ena |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.ts_func_info.tmr_index_assoc |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.ts_func_info.tmr_index_owned |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.func_caps.vf_base_id |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.fw_branch |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.fw_build |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.fw_maj_ver |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.fw_min_ver |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.fw_patch |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.fwlog.cfg.log_resolution |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.fwlog.cfg.options |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.fwlog.ring.head |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.fwlog.ring.index |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.fwlog.ring.size |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.fwlog.ring.tail |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.fwlog.supported |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.ice_seg_fmt_ver.draft |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.ice_seg_fmt_ver.major |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.ice_seg_fmt_ver.minor |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.ice_seg_fmt_ver.update |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.intrl_gran |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.io_expander_handle |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.itr_gran |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.lane_num |
(-128)-127 |
| HOST_DATA |
0 |
vsi->back->hw.logical_pf_id |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.mac_type |
0-1,3-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.num_rq_entries |
1023 |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.num_sq_entries |
64 |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.qtype |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.rq.bah |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.rq.bal |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.rq.count |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.rq.desc_buf.pa |
0-u64max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.rq.desc_buf.size |
0-u64max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.rq.head |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.rq.head_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.rq.len |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.rq.len_crit_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.rq.len_ena_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.rq.len_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.rq.next_to_clean |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.rq.next_to_use |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.rq.tail |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.rq_buf_size |
4096 |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.rq_lock.osq.tail.counter |
s32min-s32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.rq_lock.owner.counter |
s64min-s64max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq.bah |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq.bal |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq.count |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq.desc_buf.pa |
0-u64max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq.desc_buf.size |
0-u64max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq.head |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq.head_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq.len |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq.len_crit_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq.len_ena_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq.len_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq.next_to_clean |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq.next_to_use |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq.tail |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq_buf_size |
4096 |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq_last_status |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq_lock.osq.tail.counter |
s32min-s32max |
| HOST_DATA |
0 |
vsi->back->hw.mailboxq.sq_lock.owner.counter |
s64min-s64max |
| HOST_DATA |
0 |
vsi->back->hw.max_burst_size |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.max_cgds |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.mbx_snapshot.mbx_buf.head |
0-1022[c] |
| HOST_DATA |
0 |
vsi->back->hw.mbx_snapshot.mbx_buf.max_num_msgs_mbx |
0,1023 |
| HOST_DATA |
0 |
vsi->back->hw.mbx_snapshot.mbx_buf.num_iterations |
0 |
| HOST_DATA |
0 |
vsi->back->hw.mbx_snapshot.mbx_buf.num_msg_proc |
0 |
| HOST_DATA |
0 |
vsi->back->hw.mbx_snapshot.mbx_buf.num_pending_arq |
0 |
| HOST_DATA |
0 |
vsi->back->hw.mbx_snapshot.mbx_buf.state |
0 |
| HOST_DATA |
0 |
vsi->back->hw.mbx_snapshot.mbx_buf.tail |
0 |
| HOST_DATA |
0 |
vsi->back->hw.num_tx_sched_layers |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.num_tx_sched_phys_layers |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.pf_id |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.pkg_has_signing_seg |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.pkg_seg_id |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.pkg_sign_type |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.pkg_size |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.pkg_ver.draft |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.pkg_ver.major |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.pkg_ver.minor |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.pkg_ver.update |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.psm_clk_freq |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.ptp.num_lports |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.ptp.phy.e810.atqbal_flags |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.ptp.phy.eth56g.num_phys |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.ptp.phy.eth56g.onestep_ena |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.ptp.phy.eth56g.peer_delay |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.ptp.phy.eth56g.sfd_ena |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.ptp.ports_per_phy |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.recp_reuse |
0-1 |
| HOST_DATA |
0 |
vsi->back->hw.reset_ongoing |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.revision_id |
0 |
| HOST_DATA |
0 |
vsi->back->hw.rss_locks.osq.tail.counter |
s32min-s32max |
| HOST_DATA |
0 |
vsi->back->hw.rss_locks.owner.counter |
s64min-s64max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.num_rq_entries |
64 |
| HOST_DATA |
0 |
vsi->back->hw.sbq.num_sq_entries |
64 |
| HOST_DATA |
0 |
vsi->back->hw.sbq.qtype |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.rq.bah |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.rq.bal |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.rq.count |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.rq.desc_buf.pa |
0-u64max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.rq.desc_buf.size |
0-u64max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.rq.head |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.rq.head_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.rq.len |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.rq.len_crit_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.rq.len_ena_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.rq.len_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.rq.next_to_clean |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.rq.next_to_use |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.rq.tail |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.rq_buf_size |
512 |
| HOST_DATA |
0 |
vsi->back->hw.sbq.rq_lock.osq.tail.counter |
s32min-s32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.rq_lock.owner.counter |
s64min-s64max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq.bah |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq.bal |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq.count |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq.desc_buf.pa |
0-u64max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq.desc_buf.size |
0-u64max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq.head |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq.head_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq.len |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq.len_crit_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq.len_ena_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq.len_mask |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq.next_to_clean |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq.next_to_use |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq.tail |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq_buf_size |
512 |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq_last_status |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq_lock.osq.tail.counter |
s32min-s32max |
| HOST_DATA |
0 |
vsi->back->hw.sbq.sq_lock.owner.counter |
s64min-s64max |
| HOST_DATA |
0 |
vsi->back->hw.subsystem_device_id |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.subsystem_vendor_id |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.sw_entry_point_layer |
0-255 |
| HOST_DATA |
0 |
vsi->back->hw.tnl.count |
0-u16max |
| HOST_DATA |
0 |
vsi->back->hw.tnl_lock.osq.tail.counter |
s32min-s32max |
| HOST_DATA |
0 |
vsi->back->hw.tnl_lock.owner.counter |
s64min-s64max |
| HOST_DATA |
0 |
vsi->back->hw.udp_tunnel_nic.flags |
0-u32max |
| HOST_DATA |
0 |
vsi->back->hw.vendor_id |
0-u16max |
| HOST_DATA |
0 |
vsi->back->irq_tracker.entries.xa_flags |
67108868 |
| HOST_DATA |
0 |
vsi->back->irq_tracker.num_entries |
0-u16max[c] |
| HOST_DATA |
0 |
vsi->back->irq_tracker.num_static |
0-u16max[c] |
| HOST_DATA |
0 |
vsi->back->msix.max |
0-u32max[c] |
| HOST_DATA |
0 |
vsi->back->msix.total |
0-u16max |
| HOST_DATA |
0 |
vsi->back->virt_irq_tracker.base |
0-u32max[c] |
| USER_DATA |
0 |
vsi->alloc_rxq |
1-u16max[c] |
| USER_DATA |
0 |
vsi->alloc_txq |
1-u16max[c] |
| USER_DATA |
0 |
vsi->back->num_lan_rx |
1-u16max[c] |
| USER_DATA |
0 |
vsi->back->num_lan_tx |
1-u16max[c] |
| USER_DATA |
0 |
vsi->num_q_vectors |
1-u16max[c] |
| USER_DATA |
0 |
vsi->num_rxq |
1-u16max[c] |
| USER_DATA |
0 |
vsi->num_txq |
1-u16max[c] |
| USER_DATA |
0 |
vsi->req_rxq |
0-u16max[c] |
| USER_DATA |
0 |
vsi->req_txq |
0-u16max[c] |
| NO_OVERFLOW_SIMPLE |
0 |
vsi->alloc_rxq |
|
| NO_OVERFLOW_SIMPLE |
0 |
vsi->alloc_txq |
|
| NO_OVERFLOW_SIMPLE |
0 |
vsi->back->hw.flash.banks.orom_size |
|
| NO_OVERFLOW_SIMPLE |
0 |
vsi->req_rxq |
|
| NO_OVERFLOW_SIMPLE |
0 |
vsi->req_txq |
|
| HALF_LOCKED2 |
0 |
&vsi->xdp_state_lock |
|