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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c create_kernel_queue_cpsch() -> increment_queue_count()

Type Parameter Key Value
PARAM_VALUE 0 dqm 4096-ptr_max
PARAM_VALUE 1 qpd 4096-ptr_max
DATA_SOURCE 0 dqm $0
DATA_SOURCE 1 qpd $2
NOCHECK_CALL
LOCK2 0 &dqm->lock_hidden
TYPE_LOCK (struct device_queue_manager)->lock_hidden

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c create_queue_cpsch() -> increment_queue_count()

Type Parameter Key Value
PARAM_VALUE 0 dqm 4096-ptr_max
PARAM_VALUE 1 qpd 4096-ptr_max
PARAM_VALUE 2 q 4096-ptr_max
PARAM_VALUE 2 q->properties.is_gws 0
PARAM_VALUE 2 q->properties.type 0-3
CAPPED_DATA 0 dqm->total_queue_count 1
CAPPED_DATA 2 q->properties.queue_id 1
DATA_SOURCE 0 dqm $0
DATA_SOURCE 1 qpd $2
DATA_SOURCE 2 q $1
NOSPEC 2 q->properties.ctl_stack_size
NOSPEC 2 q->properties.queue_id
NOCHECK_CALL
USER_DATA 2 q->properties.ctl_stack_size 0-u32max
USER_DATA 2 q->properties.ctx_save_restore_area_address 0-u64max
USER_DATA 2 q->properties.ctx_save_restore_area_size 0-u32max
USER_DATA 2 q->properties.eop_ring_buffer_address 0-u64max
USER_DATA 2 q->properties.eop_ring_buffer_size 0-u32max
USER_DATA 2 q->properties.format 0-u32max
USER_DATA 2 q->properties.metadata_queue_size 0-u32max[u]
USER_DATA 2 q->properties.pm4_target_xcc 0-255[c]
USER_DATA 2 q->properties.priority 0-u32max
USER_DATA 2 q->properties.queue_address 0-u64max
USER_DATA 2 q->properties.queue_id 0-1023[c]
USER_DATA 2 q->properties.queue_percent 0-u32max
USER_DATA 2 q->properties.queue_size 0-u64max
USER_DATA 2 q->properties.sdma_engine_id 0-u32max
USER_DATA 2 q->properties.sdma_queue_id 0-s32max[c]
USER_DATA 2 q->properties.type 0,2
USER_DATA 2 q->sdma_id 0-s32max[c]
LOCK2 &p->mutex
LOCK2 0 &dqm->lock_hidden
TYPE_LOCK (struct device_queue_manager)->lock_hidden
TYPE_LOCK (struct kfd_process)->mutex

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c create_queue_nocpsch() -> increment_queue_count()

Type Parameter Key Value
PARAM_VALUE 0 dqm 4096-ptr_max
PARAM_VALUE 1 qpd 4096-ptr_max
PARAM_VALUE 2 q 4096-ptr_max
PARAM_VALUE 2 q->properties.is_gws 0
PARAM_VALUE 2 q->properties.type 0-4
CAPPED_DATA 0 dqm->total_queue_count 1
CAPPED_DATA 1 &qpd->queues_list 1
CAPPED_DATA 2 q->properties.queue_id 1
DATA_SOURCE 0 dqm $0
DATA_SOURCE 1 qpd $2
DATA_SOURCE 2 q $1
NOSPEC 2 q->properties.ctl_stack_size
NOSPEC 2 q->properties.queue_id
NOCHECK_CALL
USER_DATA 2 q->properties.ctl_stack_size 0-u32max
USER_DATA 2 q->properties.ctx_save_restore_area_address 0-u64max
USER_DATA 2 q->properties.ctx_save_restore_area_size 0-u32max
USER_DATA 2 q->properties.eop_ring_buffer_address 0-u64max
USER_DATA 2 q->properties.eop_ring_buffer_size 0-u32max
USER_DATA 2 q->properties.format 0-u32max
USER_DATA 2 q->properties.metadata_queue_size 0-u32max[u]
USER_DATA 2 q->properties.pm4_target_xcc 0-255[c]
USER_DATA 2 q->properties.priority 0-u32max
USER_DATA 2 q->properties.queue_address 0-u64max
USER_DATA 2 q->properties.queue_id 0-1023[c]
USER_DATA 2 q->properties.queue_percent 0-u32max
USER_DATA 2 q->properties.queue_size 0-u64max
USER_DATA 2 q->properties.sdma_engine_id 0-u32max
USER_DATA 2 q->properties.sdma_queue_id 0-s32max[c]
USER_DATA 2 q->properties.type 0,2,4
USER_DATA 2 q->sdma_id 0-s32max[c]
LOCK2 &p->mutex
LOCK2 0 &dqm->lock_hidden
TYPE_LOCK (struct device_queue_manager)->lock_hidden
TYPE_LOCK (struct kfd_process)->mutex

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c restore_process_queues_cpsch() -> increment_queue_count()

Type Parameter Key Value
PARAM_VALUE 0 dqm 4096-ptr_max
PARAM_VALUE 1 qpd 4096-ptr_max
PARAM_VALUE 2 q 4096-ptr_max
DATA_SOURCE 0 dqm $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 0 &dqm->lock_hidden
HALF_LOCKED2 &p->mutex
TYPE_LOCK (struct device_queue_manager)->lock_hidden

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c restore_process_queues_nocpsch() -> increment_queue_count()

Type Parameter Key Value
PARAM_VALUE 0 dqm 4096-ptr_max
PARAM_VALUE 1 qpd 4096-ptr_max
PARAM_VALUE 2 q 4096-ptr_max
CAPPED_DATA 1 &qpd->queues_list 1
DATA_SOURCE 0 dqm $0
DATA_SOURCE 1 qpd $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 0 &dqm->lock_hidden
HALF_LOCKED2 &p->mutex
TYPE_LOCK (struct device_queue_manager)->lock_hidden

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c resume_single_queue() -> increment_queue_count()

Type Parameter Key Value
PARAM_VALUE 0 dqm 4096-ptr_max
PARAM_VALUE 1 qpd 4096-ptr_max
PARAM_VALUE 2 q 4096-ptr_max
DATA_SOURCE 0 dqm $0
DATA_SOURCE 1 qpd $1
DATA_SOURCE 2 q $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 0 &dqm->lock_hidden
HALF_LOCKED2 &p->mutex
TYPE_LOCK (struct device_queue_manager)->lock_hidden

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c update_queue() -> increment_queue_count()

Type Parameter Key Value
PARAM_VALUE 0 dqm 4096-ptr_max
PARAM_VALUE 1 qpd 4096-ptr_max
PARAM_VALUE 2 q 4096-ptr_max
CAPPED_DATA 0 dqm->dev 1
CAPPED_DATA 2 q->device 1
CAPPED_DATA 2 q->process->n_pdds 1
DATA_SOURCE 0 dqm $0
DATA_SOURCE 2 q $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 dqm->packet_mgr.dqm->wait_times 0-u32max
USER_DATA 2 q->properties.pm4_target_xcc 0-255[c]
USER_DATA 2 q->properties.priority 0-15[u]
USER_DATA 2 q->properties.queue_address 0-u64max[c]
USER_DATA 2 q->properties.queue_size 1024-u32max[u]
LOCK2 0 &dqm->lock_hidden
HALF_LOCKED2 &p->mutex
TYPE_LOCK (struct device_queue_manager)->lock_hidden