intel_crtc_dotclock identifier - Linux source code next-20260811

Projects

linux

Versions

FIXME
- FIXME
  - next-20260811

Defined in 1 files as a prototype:

drivers/gpu/drm/i915/display/intel_display.h, line 450 (as a prototype)

Defined in 1 files as a function:

drivers/gpu/drm/i915/display/intel_display.c, line 4153 (as a function)

Referenced in 2 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_ddi.c ddi_dotclock_get() -> intel_crtc_dotclock()

Type	Parameter	Key	Value
PARAM_VALUE	0	pipe_config	4096-ptr_max
PARAM_VALUE	0	pipe_config->dp_m_n.link_m	0-16777215
PARAM_VALUE	0	pipe_config->dp_m_n.link_n	0-16777215
PARAM_VALUE	0	pipe_config->has_hdmi_sink	1
PARAM_VALUE	0	pipe_config->pipe_bpp	18,24,30,36
BUF_SIZE	0	pipe_config	(-1),4,24,64,168-s32max
BUF_SIZE	0	pipe_config	(-1),4,24,64,168-s32max
DATA_SOURCE	0	pipe_config	$0
RX_PATH
TASK_NOT_RUNNING
HOST_DATA	0	pipe_config->cgm_mode	0-u32max
HOST_DATA	0	pipe_config->csc_mode	0-u32max
HOST_DATA	0	pipe_config->dp_m2_n2.data_m	0-16777215
HOST_DATA	0	pipe_config->dp_m2_n2.data_n	0-16777215
HOST_DATA	0	pipe_config->dp_m2_n2.link_m	0-16777215
HOST_DATA	0	pipe_config->dp_m2_n2.link_n	0-16777215
HOST_DATA	0	pipe_config->dp_m_n.data_m	0-16777215
HOST_DATA	0	pipe_config->dp_m_n.data_n	0-16777215
HOST_DATA	0	pipe_config->dp_m_n.link_m	0-16777215
HOST_DATA	0	pipe_config->dp_m_n.link_n	0-16777215
HOST_DATA	0	pipe_config->dpll_hw_state.bxt.ebb0	0,256-65280[c]
HOST_DATA	0	pipe_config->dpll_hw_state.bxt.ebb4	0,8192[c]
HOST_DATA	0	pipe_config->dpll_hw_state.bxt.pcsdw12	0-95[c]
HOST_DATA	0	pipe_config->dpll_hw_state.bxt.pll0	0-255[c]
HOST_DATA	0	pipe_config->dpll_hw_state.bxt.pll1	0,256-3840[c]
HOST_DATA	0	pipe_config->dpll_hw_state.bxt.pll10	0,1024-134233088[c]
HOST_DATA	0	pipe_config->dpll_hw_state.bxt.pll2	0-4194303[c]
HOST_DATA	0	pipe_config->dpll_hw_state.bxt.pll3	0,65536[c]
HOST_DATA	0	pipe_config->dpll_hw_state.bxt.pll6	0-466703[c]
HOST_DATA	0	pipe_config->dpll_hw_state.bxt.pll8	0-1023[c]
HOST_DATA	0	pipe_config->dpll_hw_state.bxt.pll9	0,2-14[c]
HOST_DATA	0	pipe_config->dpll_hw_state.cx0pll.ssc_enabled	0-1
HOST_DATA	0	pipe_config->dpll_hw_state.hsw.spll	0-u32max
HOST_DATA	0	pipe_config->dpll_hw_state.hsw.wrpll	0-u32max
HOST_DATA	0	pipe_config->dpll_hw_state.i9xx.dpll	0-u32max
HOST_DATA	0	pipe_config->dpll_hw_state.i9xx.dpll_md	0-u32max
HOST_DATA	0	pipe_config->dpll_hw_state.i9xx.fp0	0-u32max
HOST_DATA	0	pipe_config->dpll_hw_state.i9xx.fp1	0-u32max
HOST_DATA	0	pipe_config->dpll_hw_state.icl.cfgcr0	0-u32max
HOST_DATA	0	pipe_config->dpll_hw_state.icl.cfgcr1	0-u32max
HOST_DATA	0	pipe_config->dpll_hw_state.icl.div0	0,33554432-234881024[c]
HOST_DATA	0	pipe_config->dpll_hw_state.icl.mg_clktop2_coreclkctl1	0,256-65280[c]
HOST_DATA	0	pipe_config->dpll_hw_state.icl.mg_clktop2_hsclkctl	0,256-130816[c]
HOST_DATA	0	pipe_config->dpll_hw_state.icl.mg_pll_bias	0-u32max[c]
HOST_DATA	0	pipe_config->dpll_hw_state.icl.mg_pll_div0	0-u32max
HOST_DATA	0	pipe_config->dpll_hw_state.icl.mg_pll_div1	0-u32max
HOST_DATA	0	pipe_config->dpll_hw_state.icl.mg_pll_frac_lock	0-u32max
HOST_DATA	0	pipe_config->dpll_hw_state.icl.mg_pll_lf	0-u32max
HOST_DATA	0	pipe_config->dpll_hw_state.icl.mg_pll_ssc	0-u32max
HOST_DATA	0	pipe_config->dpll_hw_state.icl.mg_pll_tdc_coldst_bias	0-u32max[c]
HOST_DATA	0	pipe_config->dpll_hw_state.icl.mg_refclkin_ctl	0,256-1792[c]
HOST_DATA	0	pipe_config->dpll_hw_state.skl.cfgcr1	0-u32max
HOST_DATA	0	pipe_config->dpll_hw_state.skl.cfgcr2	0-u32max
HOST_DATA	0	pipe_config->dsc.config.block_pred_enable	0-1
HOST_DATA	0	pipe_config->dsc.config.convert_rgb	0-1
HOST_DATA	0	pipe_config->dsc.config.native_422	0-1
HOST_DATA	0	pipe_config->dsc.config.simple_422	0-1
HOST_DATA	0	pipe_config->dsc.config.vbr_enable	0-1
HOST_DATA	0	pipe_config->dsi_pll.ctrl	0-u32max
HOST_DATA	0	pipe_config->dsi_pll.div	0-u32max
HOST_DATA	0	pipe_config->enhanced_framing	0-1
HOST_DATA	0	pipe_config->fdi_lanes	2-8[c]
HOST_DATA	0	pipe_config->fdi_m_n.data_m	0-16777215
HOST_DATA	0	pipe_config->fdi_m_n.data_n	0-16777215
HOST_DATA	0	pipe_config->fdi_m_n.link_m	0-16777215
HOST_DATA	0	pipe_config->fdi_m_n.link_n	0-16777215
HOST_DATA	0	pipe_config->fec_enable	0-1
HOST_DATA	0	pipe_config->gamma_mode	0-u32max
HOST_DATA	0	pipe_config->gmch_pfit.control	0-u32max[c]
HOST_DATA	0	pipe_config->gmch_pfit.lvds_border_bits	0,32768
HOST_DATA	0	pipe_config->gmch_pfit.pgm_ratios	0-u32max
HOST_DATA	0	pipe_config->has_audio	0-1
HOST_DATA	0	pipe_config->hw.adjusted_mode.clock	s32min-s32max[c]
HOST_DATA	0	pipe_config->hw.adjusted_mode.crtc_clock	0-s32max[c]
HOST_DATA	0	pipe_config->hw.adjusted_mode.crtc_vblank_start	0-u16max
HOST_DATA	0	pipe_config->hw.adjusted_mode.hdisplay	0-u16max[c]
HOST_DATA	0	pipe_config->hw.adjusted_mode.hsync_end	0-u16max[c]
HOST_DATA	0	pipe_config->hw.adjusted_mode.hsync_start	0-u16max[c]
HOST_DATA	0	pipe_config->hw.adjusted_mode.htotal	0-u16max[c]
HOST_DATA	0	pipe_config->hw.background_color	0-1073741823
HOST_DATA	0	pipe_config->hw.mode.clock	s32min-s32max[c]
HOST_DATA	0	pipe_config->hw.mode.crtc_clock	s32min-s32max[c]
HOST_DATA	0	pipe_config->hw.mode.crtc_hblank_end	0-u16max[c]
HOST_DATA	0	pipe_config->hw.mode.crtc_hblank_start	0-u16max[c]
HOST_DATA	0	pipe_config->hw.mode.crtc_hdisplay	0-u16max[c]
HOST_DATA	0	pipe_config->hw.mode.crtc_hsync_end	0-u16max[c]
HOST_DATA	0	pipe_config->hw.mode.crtc_hsync_start	0-u16max[c]
HOST_DATA	0	pipe_config->hw.mode.crtc_htotal	0-u16max[c]
HOST_DATA	0	pipe_config->hw.mode.crtc_vblank_start	0-u16max
HOST_DATA	0	pipe_config->hw.mode.hsync_end	0-u16max[c]
HOST_DATA	0	pipe_config->hw.mode.hsync_start	0-u16max[c]
HOST_DATA	0	pipe_config->hw.mode.htotal	0-u16max[c]
HOST_DATA	0	pipe_config->hw.pipe_mode.clock	s32min-s32max[c]
HOST_DATA	0	pipe_config->hw.pipe_mode.crtc_clock	s32min-s32max[c]
HOST_DATA	0	pipe_config->hw.pipe_mode.crtc_hblank_end	0-u16max[c]
HOST_DATA	0	pipe_config->hw.pipe_mode.crtc_hblank_start	0-u16max[c]
HOST_DATA	0	pipe_config->hw.pipe_mode.crtc_hdisplay	0-u16max[c]
HOST_DATA	0	pipe_config->hw.pipe_mode.crtc_hsync_end	0-u16max[c]
HOST_DATA	0	pipe_config->hw.pipe_mode.crtc_hsync_start	0-u16max[c]
HOST_DATA	0	pipe_config->hw.pipe_mode.crtc_htotal	0-u16max[c]
HOST_DATA	0	pipe_config->hw.pipe_mode.crtc_vblank_start	0-u16max
HOST_DATA	0	pipe_config->hw.pipe_mode.hdisplay	0-u16max[c]
HOST_DATA	0	pipe_config->hw.pipe_mode.hsync_end	0-u16max[c]
HOST_DATA	0	pipe_config->hw.pipe_mode.hsync_start	0-u16max[c]
HOST_DATA	0	pipe_config->hw.pipe_mode.htotal	0-u16max[c]
HOST_DATA	0	pipe_config->infoframes.enable	0-u32max[c]
HOST_DATA	0	pipe_config->infoframes.gcp	0-u32max
HOST_DATA	0	pipe_config->ips_enabled	0-1
HOST_DATA	0	pipe_config->lane_count	1-8[c]
HOST_DATA	0	pipe_config->min_hblank	0-s32max
HOST_DATA	0	pipe_config->mst_master_transcoder	0-s32max[c]
HOST_DATA	0	pipe_config->pixel_multiplier	1-8[c]
HOST_DATA	0	pipe_config->pixel_rate	0-u32max[c]
HOST_DATA	0	pipe_config->port_clock	0-s32max[c]
HOST_DATA	0	pipe_config->set_context_latency	0-u16max
HOST_DATA	0	pipe_config->splitter.pixel_overlap	0-255[c]
HOST_DATA	0	pipe_config->vrr.dc_balance.guardband	0-u16max
HOST_DATA	0	pipe_config->vrr.dc_balance.max_decrease	0-u16max
HOST_DATA	0	pipe_config->vrr.dc_balance.max_increase	0-u16max
HOST_DATA	0	pipe_config->vrr.dc_balance.slope	0-u16max
HOST_DATA	0	pipe_config->vrr.dc_balance.vblank_target	0-u16max
NO_OVERFLOW_SIMPLE	0	pipe_config->post_csc_lut->dev->mode_config.num_colorop
NO_OVERFLOW_SIMPLE	0	pipe_config->post_csc_lut->dev->mode_config.num_crtc
NO_OVERFLOW_SIMPLE	0	pipe_config->post_csc_lut->dev->mode_config.num_total_plane
NO_OVERFLOW_SIMPLE	0	pipe_config->post_csc_lut->dev->num_crtcs
NO_OVERFLOW_SIMPLE	0	pipe_config->pre_csc_lut->dev->mode_config.num_colorop
NO_OVERFLOW_SIMPLE	0	pipe_config->pre_csc_lut->dev->mode_config.num_crtc
NO_OVERFLOW_SIMPLE	0	pipe_config->pre_csc_lut->dev->mode_config.num_total_plane
NO_OVERFLOW_SIMPLE	0	pipe_config->pre_csc_lut->dev->num_crtcs

drivers/gpu/drm/i915/display/intel_dpll.c chv_crtc_compute_clock() -> intel_crtc_dotclock()

Type	Parameter	Key	Value
PARAM_VALUE	0	pipe_config	4096-ptr_max
DATA_SOURCE	0	pipe_config	r intel_atomic_get_new_crtc_state
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE	0	pipe_config->dpll.m1
NO_OVERFLOW_SIMPLE	0	pipe_config->dpll.m2

drivers/gpu/drm/i915/display/intel_dpll.c g4x_crtc_compute_clock() -> intel_crtc_dotclock()

Type	Parameter	Key	Value
PARAM_VALUE	0	pipe_config	4096-ptr_max
DATA_SOURCE	0	pipe_config	r intel_atomic_get_new_crtc_state
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_dpll.c hsw_crtc_compute_clock() -> intel_crtc_dotclock()

Type	Parameter	Key	Value
PARAM_VALUE	0	pipe_config	4096-ptr_max
DATA_SOURCE	0	pipe_config	r intel_atomic_get_new_crtc_state
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_dpll.c i8xx_crtc_compute_clock() -> intel_crtc_dotclock()

Type	Parameter	Key	Value
PARAM_VALUE	0	pipe_config	4096-ptr_max
DATA_SOURCE	0	pipe_config	r intel_atomic_get_new_crtc_state
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_dpll.c i9xx_crtc_compute_clock() -> intel_crtc_dotclock()

Type	Parameter	Key	Value
PARAM_VALUE	0	pipe_config	4096-ptr_max
DATA_SOURCE	0	pipe_config	r intel_atomic_get_new_crtc_state
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_dpll.c ilk_crtc_compute_clock() -> intel_crtc_dotclock()

Type	Parameter	Key	Value
PARAM_VALUE	0	pipe_config	4096-ptr_max
DATA_SOURCE	0	pipe_config	r intel_atomic_get_new_crtc_state
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_dpll.c pnv_crtc_compute_clock() -> intel_crtc_dotclock()

Type	Parameter	Key	Value
PARAM_VALUE	0	pipe_config	4096-ptr_max
DATA_SOURCE	0	pipe_config	r intel_atomic_get_new_crtc_state
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_dpll.c vlv_crtc_compute_clock() -> intel_crtc_dotclock()

Type	Parameter	Key	Value
PARAM_VALUE	0	pipe_config	4096-ptr_max
DATA_SOURCE	0	pipe_config	r intel_atomic_get_new_crtc_state
RX_PATH
TASK_NOT_RUNNING