intel_ddi_level identifier - Linux source code next-20260811 - Bootlin Elixir Cross Referencer

Projects

linux

Versions

FIXME
- FIXME
  - next-20260811

Defined in 1 files as a prototype:

drivers/gpu/drm/i915/display/intel_ddi.h, line 81 (as a prototype)

Defined in 1 files as a function:

drivers/gpu/drm/i915/display/intel_ddi.c, line 1508 (as a function)

Referenced in 5 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_lt_phy.c intel_lt_phy_set_signal_levels() -> intel_ddi_level()

Type	Parameter	Key	Value
PARAM_VALUE	0	encoder	4096-ptr_max
PARAM_VALUE	0	encoder->get_buf_trans	4096-ptr_max
PARAM_VALUE	1	crtc_state	4096-ptr_max
PARAM_VALUE	1	crtc_state->intel_dpll->info->id	0-32
PARAM_VALUE	1	crtc_state->lane_count	1-255
PARAM_VALUE	2	lane	0-254
BUF_SIZE	0	encoder	(-1),728
BUF_SIZE	0	encoder	(-1),728
CAPPED_DATA	2	lane	1
DATA_SOURCE	0	encoder	$0
DATA_SOURCE	1	crtc_state	$1
PARAM_COMPARE	1	crtc_state->lane_count	> $2
PARAM_COMPARE	2	lane	< $1->lane_count
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_cx0_phy_set_signal_levels() -> intel_ddi_level()

Type	Parameter	Key	Value
PARAM_VALUE	0	encoder	4096-ptr_max
PARAM_VALUE	0	encoder->get_buf_trans	4096-ptr_max
PARAM_VALUE	1	crtc_state	4096-ptr_max
PARAM_VALUE	1	crtc_state->intel_dpll->info->id	0-32
PARAM_VALUE	1	crtc_state->lane_count	1-255
PARAM_VALUE	2	lane	0-254
BUF_SIZE	0	encoder	(-1),728
BUF_SIZE	0	encoder	(-1),728
CAPPED_DATA	2	lane	1
DATA_SOURCE	0	encoder	$0
DATA_SOURCE	1	crtc_state	$1
PARAM_COMPARE	1	crtc_state->lane_count	> $2
PARAM_COMPARE	2	lane	< $1->lane_count
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_snps_phy.c intel_snps_phy_set_signal_levels() -> intel_ddi_level()

Type	Parameter	Key	Value
PARAM_VALUE	0	encoder	4096-ptr_max
PARAM_VALUE	0	encoder->get_buf_trans	4096-ptr_max
PARAM_VALUE	1	crtc_state	4096-ptr_max
PARAM_VALUE	1	crtc_state->intel_dpll->info->id	0-32
PARAM_VALUE	2	lane	0-3
BUF_SIZE	0	encoder	(-1),728
BUF_SIZE	0	encoder	(-1),728
DATA_SOURCE	0	encoder	$0
DATA_SOURCE	1	crtc_state	$1
FUZZY_MAX	2	lane	3
HARD_MAX	2	lane	3
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_ddi.c hsw_prepare_hdmi_ddi_buffers() -> intel_ddi_level()

Type	Parameter	Key	Value
PARAM_VALUE	0	encoder	4096-ptr_max
PARAM_VALUE	0	encoder->enable	1-u64max
PARAM_VALUE	1	crtc_state	4096-ptr_max
PARAM_VALUE	1	crtc_state->intel_dpll->info->id	0-8
PARAM_VALUE	1	crtc_state->uapi.crtc	4096-ptr_max
PARAM_VALUE	1	crtc_state->vrr.flipline	0-1
PARAM_VALUE	2	lane	0
DATA_SOURCE	0	encoder	$0
DATA_SOURCE	1	crtc_state	$1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&pool->lock

drivers/gpu/drm/i915/display/intel_ddi.c hsw_set_signal_levels() -> intel_ddi_level()

Type	Parameter	Key	Value
PARAM_VALUE	0	encoder	4096-ptr_max
PARAM_VALUE	1	crtc_state	4096-ptr_max
PARAM_VALUE	1	crtc_state->intel_dpll->info->id	0-32
PARAM_VALUE	2	lane	0
BUF_SIZE	0	encoder	(-1),728
BUF_SIZE	0	encoder	(-1),728
DATA_SOURCE	0	encoder	$0
DATA_SOURCE	1	crtc_state	$1
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_ddi.c icl_ddi_combo_vswing_program() -> intel_ddi_level()

Type	Parameter	Key	Value
PARAM_VALUE	0	encoder	4096-ptr_max
PARAM_VALUE	0	encoder->get_buf_trans	4096-ptr_max
PARAM_VALUE	1	crtc_state	4096-ptr_max
PARAM_VALUE	1	crtc_state->intel_dpll->info->id	0-32
PARAM_VALUE	2	lane	0-3
BUF_SIZE	0	encoder	(-1),728
BUF_SIZE	0	encoder	(-1),728
DATA_SOURCE	0	encoder	$0
DATA_SOURCE	1	crtc_state	$1
FUZZY_MAX	2	lane	3
HARD_MAX	2	lane	3
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_ddi.c icl_ddi_combo_vswing_program() -> intel_ddi_level()

Type	Parameter	Key	Value
PARAM_VALUE	0	encoder	4096-ptr_max
PARAM_VALUE	0	encoder->get_buf_trans	4096-ptr_max
PARAM_VALUE	1	crtc_state	4096-ptr_max
PARAM_VALUE	1	crtc_state->intel_dpll->info->id	0-32
PARAM_VALUE	2	lane	0-3
BUF_SIZE	0	encoder	(-1),728
BUF_SIZE	0	encoder	(-1),728
DATA_SOURCE	0	encoder	$0
DATA_SOURCE	1	crtc_state	$1
FUZZY_MAX	2	lane	3
HARD_MAX	2	lane	3
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_ddi.c icl_ddi_combo_vswing_program() -> intel_ddi_level()

Type	Parameter	Key	Value
PARAM_VALUE	0	encoder	4096-ptr_max
PARAM_VALUE	0	encoder->get_buf_trans	4096-ptr_max
PARAM_VALUE	1	crtc_state	4096-ptr_max
PARAM_VALUE	1	crtc_state->intel_dpll->info->id	0-32
PARAM_VALUE	2	lane	0-3
BUF_SIZE	0	encoder	(-1),728
BUF_SIZE	0	encoder	(-1),728
DATA_SOURCE	0	encoder	$0
DATA_SOURCE	1	crtc_state	$1
FUZZY_MAX	2	lane	3
HARD_MAX	2	lane	3
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_ddi.c icl_mg_phy_set_signal_levels() -> intel_ddi_level()

Type	Parameter	Key	Value
PARAM_VALUE	0	encoder	4096-ptr_max
PARAM_VALUE	0	encoder->get_buf_trans	4096-ptr_max
PARAM_VALUE	1	crtc_state	4096-ptr_max
PARAM_VALUE	1	crtc_state->intel_dpll->info->id	0-32
PARAM_VALUE	2	lane	0-2
BUF_SIZE	0	encoder	(-1),728
BUF_SIZE	0	encoder	(-1),728
DATA_SOURCE	0	encoder	$0
DATA_SOURCE	1	crtc_state	$1
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_ddi.c icl_mg_phy_set_signal_levels() -> intel_ddi_level()

Type	Parameter	Key	Value
PARAM_VALUE	0	encoder	4096-ptr_max
PARAM_VALUE	0	encoder->get_buf_trans	4096-ptr_max
PARAM_VALUE	1	crtc_state	4096-ptr_max
PARAM_VALUE	1	crtc_state->intel_dpll->info->id	0-32
PARAM_VALUE	2	lane	1-3
BUF_SIZE	0	encoder	(-1),728
BUF_SIZE	0	encoder	(-1),728
DATA_SOURCE	0	encoder	$0
DATA_SOURCE	1	crtc_state	$1
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_ddi.c icl_mg_phy_set_signal_levels() -> intel_ddi_level()

Type	Parameter	Key	Value
PARAM_VALUE	0	encoder	4096-ptr_max
PARAM_VALUE	0	encoder->get_buf_trans	4096-ptr_max
PARAM_VALUE	1	crtc_state	4096-ptr_max
PARAM_VALUE	1	crtc_state->intel_dpll->info->id	0-32
PARAM_VALUE	2	lane	0-2
BUF_SIZE	0	encoder	(-1),728
BUF_SIZE	0	encoder	(-1),728
DATA_SOURCE	0	encoder	$0
DATA_SOURCE	1	crtc_state	$1
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_ddi.c icl_mg_phy_set_signal_levels() -> intel_ddi_level()

Type	Parameter	Key	Value
PARAM_VALUE	0	encoder	4096-ptr_max
PARAM_VALUE	0	encoder->get_buf_trans	4096-ptr_max
PARAM_VALUE	1	crtc_state	4096-ptr_max
PARAM_VALUE	1	crtc_state->intel_dpll->info->id	0-32
PARAM_VALUE	2	lane	1-3
BUF_SIZE	0	encoder	(-1),728
BUF_SIZE	0	encoder	(-1),728
DATA_SOURCE	0	encoder	$0
DATA_SOURCE	1	crtc_state	$1
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_ddi.c tgl_dkl_phy_set_signal_levels() -> intel_ddi_level()

Type	Parameter	Key	Value
PARAM_VALUE	0	encoder	4096-ptr_max
PARAM_VALUE	0	encoder->get_buf_trans	4096-ptr_max
PARAM_VALUE	1	crtc_state	4096-ptr_max
PARAM_VALUE	1	crtc_state->intel_dpll->info->id	0-32
PARAM_VALUE	2	lane	0-2
BUF_SIZE	0	encoder	(-1),728
BUF_SIZE	0	encoder	(-1),728
DATA_SOURCE	0	encoder	$0
DATA_SOURCE	1	crtc_state	$1
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_ddi.c tgl_dkl_phy_set_signal_levels() -> intel_ddi_level()

Type	Parameter	Key	Value
PARAM_VALUE	0	encoder	4096-ptr_max
PARAM_VALUE	0	encoder->get_buf_trans	4096-ptr_max
PARAM_VALUE	1	crtc_state	4096-ptr_max
PARAM_VALUE	1	crtc_state->intel_dpll->info->id	0-32
PARAM_VALUE	2	lane	1-3
BUF_SIZE	0	encoder	(-1),728
BUF_SIZE	0	encoder	(-1),728
DATA_SOURCE	0	encoder	$0
DATA_SOURCE	1	crtc_state	$1
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_dpio_phy.c bxt_dpio_phy_set_signal_levels() -> intel_ddi_level()

Type	Parameter	Key	Value
PARAM_VALUE	0	encoder	4096-ptr_max
PARAM_VALUE	0	encoder->get_buf_trans	4096-ptr_max
PARAM_VALUE	1	crtc_state	4096-ptr_max
PARAM_VALUE	1	crtc_state->intel_dpll->info->id	0-32
PARAM_VALUE	1	crtc_state->lane_count	1-255
PARAM_VALUE	2	lane	0-254
BUF_SIZE	0	encoder	(-1),728
BUF_SIZE	0	encoder	(-1),728
CAPPED_DATA	2	lane	1
DATA_SOURCE	0	encoder	$0
DATA_SOURCE	1	crtc_state	$1
PARAM_COMPARE	1	crtc_state->lane_count	> $2
PARAM_COMPARE	2	lane	< $1->lane_count
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_dpio_phy.c bxt_dpio_phy_set_signal_levels() -> intel_ddi_level()

Type	Parameter	Key	Value
PARAM_VALUE	0	encoder	4096-ptr_max
PARAM_VALUE	0	encoder->get_buf_trans	4096-ptr_max
PARAM_VALUE	1	crtc_state	4096-ptr_max
PARAM_VALUE	1	crtc_state->intel_dpll->info->id	0-32
PARAM_VALUE	1	crtc_state->lane_count	1-255
PARAM_VALUE	2	lane	0-254
BUF_SIZE	0	encoder	(-1),728
BUF_SIZE	0	encoder	(-1),728
CAPPED_DATA	1	crtc_state->lane_count	1
CAPPED_DATA	2	lane	1
DATA_SOURCE	0	encoder	$0
DATA_SOURCE	1	crtc_state	$1
PARAM_COMPARE	1	crtc_state->lane_count	> $2
PARAM_COMPARE	2	lane	< $1->lane_count
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_dpio_phy.c bxt_dpio_phy_set_signal_levels() -> intel_ddi_level()

Type	Parameter	Key	Value
PARAM_VALUE	0	encoder	4096-ptr_max
PARAM_VALUE	0	encoder->get_buf_trans	4096-ptr_max
PARAM_VALUE	1	crtc_state	4096-ptr_max
PARAM_VALUE	1	crtc_state->intel_dpll->info->id	0-32
PARAM_VALUE	1	crtc_state->lane_count	1-255
PARAM_VALUE	2	lane	0-254
BUF_SIZE	0	encoder	(-1),728
BUF_SIZE	0	encoder	(-1),728
CAPPED_DATA	1	crtc_state->lane_count	1
CAPPED_DATA	2	lane	1
DATA_SOURCE	0	encoder	$0
DATA_SOURCE	1	crtc_state	$1
PARAM_COMPARE	1	crtc_state->lane_count	> $2
PARAM_COMPARE	2	lane	< $1->lane_count
RX_PATH
TASK_NOT_RUNNING