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Documented in 1 files:

Defined in 1 files as a prototype:

Defined in 2 files as a function:

Referenced in 2 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_dp.c intel_dp_compute_config() -> intel_dp_tunnel_atomic_compute_stream_bw()

Type Parameter Key Value
PARAM_VALUE 0 state 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->locked.next->next 4096-ptr_max
PARAM_VALUE 0 state->base.acquire_ctx->locked.next->prev 4096-ptr_max
PARAM_VALUE 0 state->base.crtcs 4096-ptr_max
PARAM_VALUE 0 state->base.dev 4096-ptr_max
PARAM_VALUE 1 intel_dp 4096-ptr_max
PARAM_VALUE 1 intel_dp->attached_connector 4096-ptr_max
PARAM_VALUE 1 intel_dp->attached_connector->panel.vbt.drrs_type 2
PARAM_VALUE 2 connector 4096-ptr_max
PARAM_VALUE 2 connector->panel.vbt.drrs_type 2
PARAM_VALUE 3 crtc_state 4096-ptr_max
PARAM_VALUE 3 crtc_state->dp_m2_n2.data_m 0-4278189825
PARAM_VALUE 3 crtc_state->dp_m2_n2.data_n 0-16777215
PARAM_VALUE 3 crtc_state->dp_m2_n2.link_m 0-16777215
PARAM_VALUE 3 crtc_state->dp_m2_n2.link_n 0-16777215
PARAM_VALUE 3 crtc_state->dp_m2_n2.tu 1,64
PARAM_VALUE 3 crtc_state->dsc.config.bits_per_component 0,8-255
PARAM_VALUE 3 crtc_state->dsc.config.bits_per_pixel 0
PARAM_VALUE 3 crtc_state->dsc.config.convert_rgb 0
PARAM_VALUE 3 crtc_state->dsc.config.dsc_version_major 0-15
PARAM_VALUE 3 crtc_state->dsc.config.dsc_version_minor 0-2
PARAM_VALUE 3 crtc_state->dsc.config.final_offset 0-65534
PARAM_VALUE 3 crtc_state->dsc.config.flatness_max_qp 0
PARAM_VALUE 3 crtc_state->dsc.config.flatness_min_qp 0
PARAM_VALUE 3 crtc_state->dsc.config.initial_offset 0,2048,3840-5632,5888-6144
PARAM_VALUE 3 crtc_state->dsc.config.line_buf_depth 0,8-13
PARAM_VALUE 3 crtc_state->dsc.config.mux_word_size 0,48,64
PARAM_VALUE 3 crtc_state->dsc.config.native_420 0
PARAM_VALUE 3 crtc_state->dsc.config.native_422 0
PARAM_VALUE 3 crtc_state->dsc.config.nfl_bpg_offset 0
PARAM_VALUE 3 crtc_state->dsc.config.nsl_bpg_offset 0
PARAM_VALUE 3 crtc_state->dsc.config.pic_height 0
PARAM_VALUE 3 crtc_state->dsc.config.pic_width 0
PARAM_VALUE 3 crtc_state->dsc.config.rc_bits 0
PARAM_VALUE 3 crtc_state->dsc.config.rc_edge_factor 0
PARAM_VALUE 3 crtc_state->dsc.config.rc_model_size 0,8192
PARAM_VALUE 3 crtc_state->dsc.config.scale_decrement_interval 0-21845
PARAM_VALUE 3 crtc_state->dsc.config.simple_422 0
PARAM_VALUE 3 crtc_state->dsc.config.slice_count 0
PARAM_VALUE 3 crtc_state->dsc.config.slice_height 0,2,108
PARAM_VALUE 3 crtc_state->dsc.config.slice_width 0
PARAM_VALUE 3 crtc_state->dsc.config.vbr_enable 0
PARAM_VALUE 3 crtc_state->dsc.slice_config.pipes_per_line 0-8
PARAM_VALUE 3 crtc_state->dsc.slice_config.slices_per_stream 0-4
PARAM_VALUE 3 crtc_state->dsc.slice_config.streams_per_pipe 0-3
PARAM_VALUE 3 crtc_state->framestart_delay 1
PARAM_VALUE 3 crtc_state->output_format 0-2
PARAM_VALUE 3 crtc_state->pipe_src.x1 0
PARAM_VALUE 3 crtc_state->pipe_src.x2 0-u16max
PARAM_VALUE 3 crtc_state->pipe_src.y1 0
PARAM_VALUE 3 crtc_state->pipe_src.y2 0-u16max
PARAM_VALUE 3 crtc_state->pixel_multiplier 1
PARAM_VALUE 3 crtc_state->sink_format 0-1
PARAM_VALUE 3 crtc_state->uapi.crtc 4096-ptr_max
PARAM_VALUE 3 crtc_state->update_m_n 1
PARAM_VALUE 3 *crtc_state->eld 0-255
BUF_SIZE 1 intel_dp 6896
CAPPED_DATA 0 state->base.dev->mode_config.num_crtc 1
CAPPED_DATA 0 state->base.dev->mode_config.num_total_plane 1
CAPPED_DATA 2 connector->panel.vbt.seamless_drrs_min_refresh_rate 1
DATA_SOURCE 0 state $0
DATA_SOURCE 1 intel_dp r enc_to_intel_dp
DATA_SOURCE 3 crtc_state $2
MEM_ZERO 3 &crtc_state->dsc.config
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_dp_mst.c mst_stream_compute_config() -> intel_dp_tunnel_atomic_compute_stream_bw()

Type Parameter Key Value
PARAM_VALUE 0 state 4096-ptr_max
PARAM_VALUE 0 state->base.crtcs 4096-ptr_max
PARAM_VALUE 0 state->base.dev 4096-ptr_max
PARAM_VALUE 1 intel_dp 4096-ptr_max
PARAM_VALUE 2 connector 4096-ptr_max
PARAM_VALUE 3 crtc_state 4096-ptr_max
PARAM_VALUE 3 crtc_state->framestart_delay 1
PARAM_VALUE 3 crtc_state->hw.adjusted_mode.flags 0,4-u32max
PARAM_VALUE 3 crtc_state->min_voltage_level 0-3
PARAM_VALUE 3 crtc_state->output_format 0
PARAM_VALUE 3 crtc_state->pipe_src.x1 0
PARAM_VALUE 3 crtc_state->pipe_src.x2 0-u16max
PARAM_VALUE 3 crtc_state->pipe_src.y1 0
PARAM_VALUE 3 crtc_state->pipe_src.y2 0-u16max
PARAM_VALUE 3 crtc_state->pixel_multiplier 1
PARAM_VALUE 3 crtc_state->sink_format 0
PARAM_VALUE 3 crtc_state->uapi.crtc 4096-ptr_max
PARAM_VALUE 3 *crtc_state->eld 0-255
BUF_SIZE 1 intel_dp 6896
CAPPED_DATA 0 state->base.dev->mode_config.num_crtc 1
CAPPED_DATA 0 state->base.dev->mode_config.num_total_plane 1
DATA_SOURCE 0 state $0
DATA_SOURCE 1 intel_dp r to_primary_dp
DATA_SOURCE 3 crtc_state $2
RX_PATH
TASK_NOT_RUNNING