intel_dpll_get_freq identifier - Linux source code next-20260811

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linux

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FIXME
- FIXME
  - next-20260811

Documented in 1 files:

drivers/gpu/drm/i915/display/intel_dpll_mgr.c, line 5132

Defined in 1 files as a prototype:

drivers/gpu/drm/i915/display/intel_dpll_mgr.h, line 452 (as a prototype)

Defined in 1 files as a function:

drivers/gpu/drm/i915/display/intel_dpll_mgr.c, line 5140 (as a function)

Referenced in 1 files:

drivers/gpu/drm/i915/display/intel_ddi.c

Smatch caller information:

drivers/gpu/drm/i915/display/intel_ddi.c icl_ddi_tc_get_clock() -> intel_dpll_get_freq()

Type	Parameter	Key	Value
PARAM_VALUE	1	pll	4096-ptr_max
PARAM_VALUE	1	pll->index	0-8
PARAM_VALUE	1	pll->info	4096-ptr_max
PARAM_VALUE	1	pll->info->id	0-1,3-8
PARAM_VALUE	2	dpll_hw_state	4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
HOST_DATA	2	dpll_hw_state->bxt.ebb0	0,256-65280[c]
HOST_DATA	2	dpll_hw_state->bxt.ebb4	0,8192[c]
HOST_DATA	2	dpll_hw_state->bxt.pcsdw12	0-95[c]
HOST_DATA	2	dpll_hw_state->bxt.pll0	0-255[c]
HOST_DATA	2	dpll_hw_state->bxt.pll1	0,256-3840[c]
HOST_DATA	2	dpll_hw_state->bxt.pll10	0,1024-134233088[c]
HOST_DATA	2	dpll_hw_state->bxt.pll2	0-4194303[c]
HOST_DATA	2	dpll_hw_state->bxt.pll3	0,65536[c]
HOST_DATA	2	dpll_hw_state->bxt.pll6	0-466703[c]
HOST_DATA	2	dpll_hw_state->bxt.pll8	0-1023[c]
HOST_DATA	2	dpll_hw_state->bxt.pll9	0,2-14[c]
HOST_DATA	2	dpll_hw_state->cx0pll.ssc_enabled	0-1
HOST_DATA	2	dpll_hw_state->hsw.spll	0-u32max
HOST_DATA	2	dpll_hw_state->hsw.wrpll	0-u32max
HOST_DATA	2	dpll_hw_state->i9xx.dpll	0-u32max
HOST_DATA	2	dpll_hw_state->i9xx.dpll_md	0-u32max
HOST_DATA	2	dpll_hw_state->i9xx.fp0	0-u32max
HOST_DATA	2	dpll_hw_state->i9xx.fp1	0-u32max
HOST_DATA	2	dpll_hw_state->icl.cfgcr0	0-u32max
HOST_DATA	2	dpll_hw_state->icl.cfgcr1	0-u32max
HOST_DATA	2	dpll_hw_state->icl.div0	0,33554432-234881024[c]
HOST_DATA	2	dpll_hw_state->icl.mg_clktop2_coreclkctl1	0,256-65280[c]
HOST_DATA	2	dpll_hw_state->icl.mg_clktop2_hsclkctl	0,256-130816[c]
HOST_DATA	2	dpll_hw_state->icl.mg_pll_bias	0-u32max[c]
HOST_DATA	2	dpll_hw_state->icl.mg_pll_div0	0-u32max
HOST_DATA	2	dpll_hw_state->icl.mg_pll_div1	0-u32max
HOST_DATA	2	dpll_hw_state->icl.mg_pll_frac_lock	0-u32max
HOST_DATA	2	dpll_hw_state->icl.mg_pll_lf	0-u32max
HOST_DATA	2	dpll_hw_state->icl.mg_pll_ssc	0-u32max
HOST_DATA	2	dpll_hw_state->icl.mg_pll_tdc_coldst_bias	0-u32max[c]
HOST_DATA	2	dpll_hw_state->icl.mg_refclkin_ctl	0,256-1792[c]
HOST_DATA	2	dpll_hw_state->skl.cfgcr1	0-u32max
HOST_DATA	2	dpll_hw_state->skl.cfgcr2	0-u32max

drivers/gpu/drm/i915/display/intel_ddi.c intel_ddi_get_clock() -> intel_dpll_get_freq()

Type	Parameter	Key	Value
PARAM_VALUE	1	pll->index	0-8
PARAM_VALUE	2	dpll_hw_state	4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
HOST_DATA	2	dpll_hw_state->bxt.ebb0	0,256-65280[c]
HOST_DATA	2	dpll_hw_state->bxt.ebb4	0,8192[c]
HOST_DATA	2	dpll_hw_state->bxt.pcsdw12	0-95[c]
HOST_DATA	2	dpll_hw_state->bxt.pll0	0-255[c]
HOST_DATA	2	dpll_hw_state->bxt.pll1	0,256-3840[c]
HOST_DATA	2	dpll_hw_state->bxt.pll10	0,1024-134233088[c]
HOST_DATA	2	dpll_hw_state->bxt.pll2	0-4194303[c]
HOST_DATA	2	dpll_hw_state->bxt.pll3	0,65536[c]
HOST_DATA	2	dpll_hw_state->bxt.pll6	0-466703[c]
HOST_DATA	2	dpll_hw_state->bxt.pll8	0-1023[c]
HOST_DATA	2	dpll_hw_state->bxt.pll9	0,2-14[c]
HOST_DATA	2	dpll_hw_state->cx0pll.ssc_enabled	0-1
HOST_DATA	2	dpll_hw_state->hsw.spll	0-u32max
HOST_DATA	2	dpll_hw_state->hsw.wrpll	0-u32max
HOST_DATA	2	dpll_hw_state->i9xx.dpll	0-u32max
HOST_DATA	2	dpll_hw_state->i9xx.dpll_md	0-u32max
HOST_DATA	2	dpll_hw_state->i9xx.fp0	0-u32max
HOST_DATA	2	dpll_hw_state->i9xx.fp1	0-u32max
HOST_DATA	2	dpll_hw_state->icl.cfgcr0	0-u32max
HOST_DATA	2	dpll_hw_state->icl.cfgcr1	0-u32max
HOST_DATA	2	dpll_hw_state->icl.div0	0,33554432-234881024[c]
HOST_DATA	2	dpll_hw_state->icl.mg_clktop2_coreclkctl1	0,256-65280[c]
HOST_DATA	2	dpll_hw_state->icl.mg_clktop2_hsclkctl	0,256-130816[c]
HOST_DATA	2	dpll_hw_state->icl.mg_pll_bias	0-u32max[c]
HOST_DATA	2	dpll_hw_state->icl.mg_pll_div0	0-u32max
HOST_DATA	2	dpll_hw_state->icl.mg_pll_div1	0-u32max
HOST_DATA	2	dpll_hw_state->icl.mg_pll_frac_lock	0-u32max
HOST_DATA	2	dpll_hw_state->icl.mg_pll_lf	0-u32max
HOST_DATA	2	dpll_hw_state->icl.mg_pll_ssc	0-u32max
HOST_DATA	2	dpll_hw_state->icl.mg_pll_tdc_coldst_bias	0-u32max[c]
HOST_DATA	2	dpll_hw_state->icl.mg_refclkin_ctl	0,256-1792[c]
HOST_DATA	2	dpll_hw_state->skl.cfgcr1	0-u32max
HOST_DATA	2	dpll_hw_state->skl.cfgcr2	0-u32max

drivers/gpu/drm/i915/display/intel_ddi.c mtl_ddi_cx0_get_config() -> intel_dpll_get_freq()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->dpll.num_dpll	1-s32max
PARAM_VALUE	1	pll	4096-ptr_max
PARAM_VALUE	1	pll->index	0-8
PARAM_VALUE	1	pll->info	4096-ptr_max
PARAM_VALUE	1	pll->info->id	0-1,3-8
PARAM_VALUE	2	dpll_hw_state	4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
HOST_DATA	2	dpll_hw_state->bxt.ebb0	0,256-65280[c]
HOST_DATA	2	dpll_hw_state->bxt.ebb4	0,8192[c]
HOST_DATA	2	dpll_hw_state->bxt.pcsdw12	0-95[c]
HOST_DATA	2	dpll_hw_state->bxt.pll0	0-255[c]
HOST_DATA	2	dpll_hw_state->bxt.pll1	0,256-3840[c]
HOST_DATA	2	dpll_hw_state->bxt.pll10	0,1024-134233088[c]
HOST_DATA	2	dpll_hw_state->bxt.pll2	0-4194303[c]
HOST_DATA	2	dpll_hw_state->bxt.pll3	0,65536[c]
HOST_DATA	2	dpll_hw_state->bxt.pll6	0-466703[c]
HOST_DATA	2	dpll_hw_state->bxt.pll8	0-1023[c]
HOST_DATA	2	dpll_hw_state->bxt.pll9	0,2-14[c]
HOST_DATA	2	dpll_hw_state->cx0pll.ssc_enabled	0-1
HOST_DATA	2	dpll_hw_state->hsw.spll	0-u32max
HOST_DATA	2	dpll_hw_state->hsw.wrpll	0-u32max
HOST_DATA	2	dpll_hw_state->i9xx.dpll	0-u32max
HOST_DATA	2	dpll_hw_state->i9xx.dpll_md	0-u32max
HOST_DATA	2	dpll_hw_state->i9xx.fp0	0-u32max
HOST_DATA	2	dpll_hw_state->i9xx.fp1	0-u32max
HOST_DATA	2	dpll_hw_state->icl.cfgcr0	0-u32max
HOST_DATA	2	dpll_hw_state->icl.cfgcr1	0-u32max
HOST_DATA	2	dpll_hw_state->icl.div0	0,33554432-234881024[c]
HOST_DATA	2	dpll_hw_state->icl.mg_clktop2_coreclkctl1	0,256-65280[c]
HOST_DATA	2	dpll_hw_state->icl.mg_clktop2_hsclkctl	0,256-130816[c]
HOST_DATA	2	dpll_hw_state->icl.mg_pll_bias	0-u32max[c]
HOST_DATA	2	dpll_hw_state->icl.mg_pll_div0	0-u32max
HOST_DATA	2	dpll_hw_state->icl.mg_pll_div1	0-u32max
HOST_DATA	2	dpll_hw_state->icl.mg_pll_frac_lock	0-u32max
HOST_DATA	2	dpll_hw_state->icl.mg_pll_lf	0-u32max
HOST_DATA	2	dpll_hw_state->icl.mg_pll_ssc	0-u32max
HOST_DATA	2	dpll_hw_state->icl.mg_pll_tdc_coldst_bias	0-u32max[c]
HOST_DATA	2	dpll_hw_state->icl.mg_refclkin_ctl	0,256-1792[c]
HOST_DATA	2	dpll_hw_state->skl.cfgcr1	0-u32max
HOST_DATA	2	dpll_hw_state->skl.cfgcr2	0-u32max