Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c intel_crtc_state_dump() -> intel_dump_m_n_config()

Type Parameter Key Value
PARAM_VALUE 0 p 908993075820675072
PARAM_VALUE 0 p->printfn 4096-ptr_max
PARAM_VALUE 1 pipe_config 4096-ptr_max
PARAM_VALUE 1 pipe_config->has_pch_encoder 1
PARAM_VALUE 1 pipe_config->hw.enable 1
PARAM_VALUE 1 pipe_config->uapi.crtc 4096-ptr_max
PARAM_VALUE 2 id 5394378763899686912
PARAM_VALUE 4 m_n 4096-ptr_max
BUF_SIZE 1 pipe_config (-1),4832
BUF_SIZE 1 pipe_config (-1),4832
BUF_SIZE 2 id 4
DATA_SOURCE 1 pipe_config $0
STR_LEN 0 p 6-8,14
STR_LEN 1 pipe_config 3
STR_LEN 1 pipe_config 6-8,14
TERMINATED 2 id 1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 1 pipe_config->cgm_mode 0-u32max
HOST_DATA 1 pipe_config->csc_mode 0-u32max
HOST_DATA 1 pipe_config->dsc.config.block_pred_enable 0-1
HOST_DATA 1 pipe_config->dsc.config.convert_rgb 0-1
HOST_DATA 1 pipe_config->dsc.config.native_422 0-1
HOST_DATA 1 pipe_config->dsc.config.simple_422 0-1
HOST_DATA 1 pipe_config->dsc.config.vbr_enable 0-1
HOST_DATA 1 pipe_config->fdi_m_n.link_n 0-16777215
HOST_DATA 1 pipe_config->gamma_mode 0-u32max
HOST_DATA 1 pipe_config->gmch_pfit.pgm_ratios 0-u32max
HOST_DATA 1 pipe_config->hw.adjusted_mode.clock 0[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.crtc_clock 0-s32max[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.crtc_vblank_start 0-u16max
HOST_DATA 1 pipe_config->hw.adjusted_mode.hdisplay 0[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.hsync_end 0[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.hsync_start 0[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.htotal 0[c]
HOST_DATA 1 pipe_config->hw.background_color 0-1073741823
HOST_DATA 1 pipe_config->hw.mode.clock s32min-s32max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_clock s32min-s32max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hblank_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hblank_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hdisplay 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hsync_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hsync_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_htotal 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_vblank_start 0-u16max
HOST_DATA 1 pipe_config->hw.mode.hsync_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.hsync_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.htotal 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.clock s32min-s32max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_clock s32min-s32max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hblank_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hblank_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hdisplay 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hsync_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hsync_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_htotal 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_vblank_start 0-u16max
HOST_DATA 1 pipe_config->hw.pipe_mode.hdisplay 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.hsync_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.hsync_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.htotal 0-u16max[c]
HOST_DATA 1 pipe_config->ips_enabled 0-1
HOST_DATA 1 pipe_config->min_hblank 0-s32max
HOST_DATA 1 pipe_config->pixel_rate 0-u32max[c]
HOST_DATA 1 pipe_config->set_context_latency 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.guardband 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.max_decrease 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.max_increase 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.slope 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.vblank_target 0-u16max
HOST_DATA 4 m_n->link_n 0-16777215
NO_OVERFLOW_SIMPLE 1 pipe_config->post_csc_lut->dev->mode_config.num_colorop
NO_OVERFLOW_SIMPLE 1 pipe_config->post_csc_lut->dev->mode_config.num_crtc
NO_OVERFLOW_SIMPLE 1 pipe_config->post_csc_lut->dev->mode_config.num_total_plane
NO_OVERFLOW_SIMPLE 1 pipe_config->post_csc_lut->dev->num_crtcs
NO_OVERFLOW_SIMPLE 1 pipe_config->pre_csc_lut->dev->mode_config.num_colorop
NO_OVERFLOW_SIMPLE 1 pipe_config->pre_csc_lut->dev->mode_config.num_crtc
NO_OVERFLOW_SIMPLE 1 pipe_config->pre_csc_lut->dev->mode_config.num_total_plane
NO_OVERFLOW_SIMPLE 1 pipe_config->pre_csc_lut->dev->num_crtcs

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c intel_crtc_state_dump() -> intel_dump_m_n_config()

Type Parameter Key Value
PARAM_VALUE 0 p 908993075820675072
PARAM_VALUE 0 p->printfn 4096-ptr_max
PARAM_VALUE 1 pipe_config 4096-ptr_max
PARAM_VALUE 1 pipe_config->hw.enable 1
PARAM_VALUE 1 pipe_config->output_types 128-u32max
PARAM_VALUE 1 pipe_config->uapi.crtc 4096-ptr_max
PARAM_VALUE 2 id 6885022221182816256
PARAM_VALUE 4 m_n 4096-ptr_max
BUF_SIZE 1 pipe_config (-1),4832
BUF_SIZE 1 pipe_config (-1),4832
BUF_SIZE 2 id 7
DATA_SOURCE 1 pipe_config $0
STR_LEN 0 p 6-8,14
STR_LEN 1 pipe_config 6
STR_LEN 1 pipe_config 6-8,14
TERMINATED 2 id 1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 1 pipe_config->cgm_mode 0-u32max
HOST_DATA 1 pipe_config->csc_mode 0-u32max
HOST_DATA 1 pipe_config->dsc.config.block_pred_enable 0-1
HOST_DATA 1 pipe_config->dsc.config.convert_rgb 0-1
HOST_DATA 1 pipe_config->dsc.config.native_422 0-1
HOST_DATA 1 pipe_config->dsc.config.simple_422 0-1
HOST_DATA 1 pipe_config->dsc.config.vbr_enable 0-1
HOST_DATA 1 pipe_config->fdi_m_n.link_n 0-16777215
HOST_DATA 1 pipe_config->gamma_mode 0-u32max
HOST_DATA 1 pipe_config->gmch_pfit.pgm_ratios 0-u32max
HOST_DATA 1 pipe_config->hw.adjusted_mode.clock 0[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.crtc_clock 0-s32max[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.crtc_vblank_start 0-u16max
HOST_DATA 1 pipe_config->hw.adjusted_mode.hdisplay 0[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.hsync_end 0[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.hsync_start 0[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.htotal 0[c]
HOST_DATA 1 pipe_config->hw.background_color 0-1073741823
HOST_DATA 1 pipe_config->hw.mode.clock s32min-s32max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_clock s32min-s32max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hblank_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hblank_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hdisplay 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hsync_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hsync_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_htotal 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_vblank_start 0-u16max
HOST_DATA 1 pipe_config->hw.mode.hsync_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.hsync_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.htotal 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.clock s32min-s32max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_clock s32min-s32max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hblank_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hblank_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hdisplay 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hsync_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hsync_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_htotal 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_vblank_start 0-u16max
HOST_DATA 1 pipe_config->hw.pipe_mode.hdisplay 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.hsync_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.hsync_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.htotal 0-u16max[c]
HOST_DATA 1 pipe_config->ips_enabled 0-1
HOST_DATA 1 pipe_config->min_hblank 0-s32max
HOST_DATA 1 pipe_config->pixel_rate 0-u32max[c]
HOST_DATA 1 pipe_config->set_context_latency 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.guardband 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.max_decrease 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.max_increase 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.slope 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.vblank_target 0-u16max
NO_OVERFLOW_SIMPLE 1 pipe_config->post_csc_lut->dev->mode_config.num_colorop
NO_OVERFLOW_SIMPLE 1 pipe_config->post_csc_lut->dev->mode_config.num_crtc
NO_OVERFLOW_SIMPLE 1 pipe_config->post_csc_lut->dev->mode_config.num_total_plane
NO_OVERFLOW_SIMPLE 1 pipe_config->post_csc_lut->dev->num_crtcs
NO_OVERFLOW_SIMPLE 1 pipe_config->pre_csc_lut->dev->mode_config.num_colorop
NO_OVERFLOW_SIMPLE 1 pipe_config->pre_csc_lut->dev->mode_config.num_crtc
NO_OVERFLOW_SIMPLE 1 pipe_config->pre_csc_lut->dev->mode_config.num_total_plane
NO_OVERFLOW_SIMPLE 1 pipe_config->pre_csc_lut->dev->num_crtcs

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c intel_crtc_state_dump() -> intel_dump_m_n_config()

Type Parameter Key Value
PARAM_VALUE 0 p 908993075820675072
PARAM_VALUE 0 p->printfn 4096-ptr_max
PARAM_VALUE 1 pipe_config 4096-ptr_max
PARAM_VALUE 1 pipe_config->hw.enable 1
PARAM_VALUE 1 pipe_config->output_types 128-u32max
PARAM_VALUE 1 pipe_config->uapi.crtc 4096-ptr_max
PARAM_VALUE 2 id 4947949899028242432
PARAM_VALUE 4 m_n 4096-ptr_max
BUF_SIZE 1 pipe_config (-1),4832
BUF_SIZE 1 pipe_config (-1),4832
BUF_SIZE 2 id 9
DATA_SOURCE 1 pipe_config $0
STR_LEN 0 p 6-8,14
STR_LEN 1 pipe_config 6-8,14
STR_LEN 1 pipe_config 8
TERMINATED 2 id 1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 1 pipe_config->cgm_mode 0-u32max
HOST_DATA 1 pipe_config->csc_mode 0-u32max
HOST_DATA 1 pipe_config->dsc.config.block_pred_enable 0-1
HOST_DATA 1 pipe_config->dsc.config.convert_rgb 0-1
HOST_DATA 1 pipe_config->dsc.config.native_422 0-1
HOST_DATA 1 pipe_config->dsc.config.simple_422 0-1
HOST_DATA 1 pipe_config->dsc.config.vbr_enable 0-1
HOST_DATA 1 pipe_config->fdi_m_n.link_n 0-16777215
HOST_DATA 1 pipe_config->gamma_mode 0-u32max
HOST_DATA 1 pipe_config->gmch_pfit.pgm_ratios 0-u32max
HOST_DATA 1 pipe_config->hw.adjusted_mode.clock 0[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.crtc_clock 0-s32max[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.crtc_vblank_start 0-u16max
HOST_DATA 1 pipe_config->hw.adjusted_mode.hdisplay 0[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.hsync_end 0[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.hsync_start 0[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.htotal 0[c]
HOST_DATA 1 pipe_config->hw.background_color 0-1073741823
HOST_DATA 1 pipe_config->hw.mode.clock s32min-s32max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_clock s32min-s32max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hblank_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hblank_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hdisplay 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hsync_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hsync_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_htotal 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_vblank_start 0-u16max
HOST_DATA 1 pipe_config->hw.mode.hsync_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.hsync_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.htotal 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.clock s32min-s32max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_clock s32min-s32max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hblank_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hblank_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hdisplay 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hsync_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hsync_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_htotal 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_vblank_start 0-u16max
HOST_DATA 1 pipe_config->hw.pipe_mode.hdisplay 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.hsync_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.hsync_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.htotal 0-u16max[c]
HOST_DATA 1 pipe_config->ips_enabled 0-1
HOST_DATA 1 pipe_config->min_hblank 0-s32max
HOST_DATA 1 pipe_config->pixel_rate 0-u32max[c]
HOST_DATA 1 pipe_config->set_context_latency 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.guardband 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.max_decrease 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.max_increase 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.slope 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.vblank_target 0-u16max
NO_OVERFLOW_SIMPLE 1 pipe_config->post_csc_lut->dev->mode_config.num_colorop
NO_OVERFLOW_SIMPLE 1 pipe_config->post_csc_lut->dev->mode_config.num_crtc
NO_OVERFLOW_SIMPLE 1 pipe_config->post_csc_lut->dev->mode_config.num_total_plane
NO_OVERFLOW_SIMPLE 1 pipe_config->post_csc_lut->dev->num_crtcs
NO_OVERFLOW_SIMPLE 1 pipe_config->pre_csc_lut->dev->mode_config.num_colorop
NO_OVERFLOW_SIMPLE 1 pipe_config->pre_csc_lut->dev->mode_config.num_crtc
NO_OVERFLOW_SIMPLE 1 pipe_config->pre_csc_lut->dev->mode_config.num_total_plane
NO_OVERFLOW_SIMPLE 1 pipe_config->pre_csc_lut->dev->num_crtcs