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Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 3 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_modeset_setup.c intel_modeset_readout_hw_state() -> intel_encoder_get_config()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 0 encoder->base.crtc 4096-ptr_max
BUF_SIZE 0 encoder->base.crtc 2048
CAPPED_DATA 0 &encoder->base.head 1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 &display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_modeset_setup.c intel_modeset_readout_hw_state() -> intel_encoder_get_config()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 0 encoder->base.crtc 4096-ptr_max
PARAM_VALUE 0 encoder->get_config 4096-ptr_max
BUF_SIZE 0 encoder->base.crtc 2048
CAPPED_DATA 0 &encoder->base.head 1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 &display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_display.c intel_encoder_current_mode() -> intel_encoder_get_config()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 0 encoder->base.base.id 0-s32max
PARAM_VALUE 0 encoder->base.base.type 3772834016
PARAM_VALUE 0 encoder->base.bridge_chain.next 4096-ptr_max
PARAM_VALUE 0 encoder->base.bridge_chain.next->next 4096-ptr_max
PARAM_VALUE 0 encoder->base.bridge_chain.prev 4096-ptr_max
PARAM_VALUE 0 encoder->base.bridge_chain.prev->next 4096-ptr_max
PARAM_VALUE 0 encoder->base.bridge_chain.prev->prev 4096-ptr_max
PARAM_VALUE 0 encoder->base.bridge_chain_mutex.dep_map->name 0-255
PARAM_VALUE 0 encoder->base.bridge_chain_mutex.magic 4096-ptr_max
PARAM_VALUE 0 encoder->base.dev 4096-ptr_max
PARAM_VALUE 0 encoder->base.dev->driver 4096-ptr_max
PARAM_VALUE 0 encoder->base.dev->mode_config.idr_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 0 encoder->base.dev->mode_config.num_encoder s32min-31
PARAM_VALUE 0 encoder->base.funcs 4096-ptr_max
PARAM_VALUE 0 encoder->base.funcs->debugfs_init 0,6973352036378669056
PARAM_VALUE 0 encoder->base.funcs->destroy 0,4096-ptr_max
PARAM_VALUE 0 encoder->base.funcs->early_unregister 0,4760937263027425280
PARAM_VALUE 0 encoder->base.funcs->late_register 0,701314789818085376,1181227410646614016,1647545275053064192,2341737043894939648,3940292699586646016,6122176978846912512
PARAM_VALUE 0 encoder->base.funcs->reset 0,4096-ptr_max
PARAM_VALUE 0 encoder->base.head.next 4096-ptr_max
PARAM_VALUE 0 encoder->base.index 0-31,2147483648-u32max
PARAM_VALUE 0 encoder->compute_config 5717215059527946240,6479865939347615744,9169219125220982784
PARAM_VALUE 0 encoder->disable 414660624237387776,1787080728625872896,1871483354046160896,4990336112837017600
PARAM_VALUE 0 encoder->get_config 4578623074056224768,6556076764131598336,8558313647008907264
PARAM_VALUE 0 encoder->get_hw_state 2506372164483657728,5010860165343096832,7652006460455616512
PARAM_VALUE 0 encoder->pipe_mask 1-2,255
PARAM_VALUE 0 encoder->port (-1)-2
PARAM_VALUE 0 encoder->power_domain 41,43
PARAM_VALUE 0 encoder->pre_enable 1017970325344051200,1220361101322121216,6761798114821378048
PARAM_VALUE 0 encoder->type 2,4,9
PARAM_VALUE 1 crtc_state 4096-ptr_max
PARAM_VALUE 1 crtc_state->active_non_psr_pipes 0
PARAM_VALUE 1 crtc_state->active_planes 0
PARAM_VALUE 1 crtc_state->alpm_state.fast_wake_lines 0
PARAM_VALUE 1 crtc_state->alpm_state.io_wake_lines 0
PARAM_VALUE 1 crtc_state->async_flip_planes 0
PARAM_VALUE 1 crtc_state->bw_constrained 0
PARAM_VALUE 1 crtc_state->c8_planes 0
PARAM_VALUE 1 crtc_state->clock_set 0
PARAM_VALUE 1 crtc_state->crc_enabled 0
PARAM_VALUE 1 crtc_state->disable_cxsr 0
PARAM_VALUE 1 crtc_state->dither 0
PARAM_VALUE 1 crtc_state->dither_force_disable 0
PARAM_VALUE 1 crtc_state->do_async_flip 0
PARAM_VALUE 1 crtc_state->dp_m2_n2.data_m 0
PARAM_VALUE 1 crtc_state->dp_m2_n2.data_n 0
PARAM_VALUE 1 crtc_state->dp_m2_n2.link_m 0
PARAM_VALUE 1 crtc_state->dp_m2_n2.link_n 0
PARAM_VALUE 1 crtc_state->dp_m2_n2.tu 0
PARAM_VALUE 1 crtc_state->dp_m_n.data_m 0
PARAM_VALUE 1 crtc_state->dp_m_n.data_n 0
PARAM_VALUE 1 crtc_state->dp_m_n.link_m 0
PARAM_VALUE 1 crtc_state->dp_m_n.link_n 0
PARAM_VALUE 1 crtc_state->dp_m_n.tu 0
PARAM_VALUE 1 crtc_state->dp_tunnel_ref.tracker 0
PARAM_VALUE 1 crtc_state->dp_tunnel_ref.tunnel 0
PARAM_VALUE 1 crtc_state->dpll.dot 0
PARAM_VALUE 1 crtc_state->dpll.m 0
PARAM_VALUE 1 crtc_state->dpll.m1 0
PARAM_VALUE 1 crtc_state->dpll.m2 0
PARAM_VALUE 1 crtc_state->dpll.n 0
PARAM_VALUE 1 crtc_state->dpll.p 0
PARAM_VALUE 1 crtc_state->dpll.p1 0
PARAM_VALUE 1 crtc_state->dpll.p2 0
PARAM_VALUE 1 crtc_state->dpll.vco 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.ebb0 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.ebb4 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.pcsdw12 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.pll0 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.pll1 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.pll10 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.pll2 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.pll3 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.pll6 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.pll8 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.pll9 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.cx0pll.c10.tx 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.hsw.spll 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.hsw.wrpll 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.icl.cfgcr0 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.icl.cfgcr1 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.icl.div0 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.icl.mg_pll_lf 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.mpllb.clock 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.skl.cfgcr1 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.skl.cfgcr2 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.skl.ctrl1 0
PARAM_VALUE 1 crtc_state->dsb_color 0
PARAM_VALUE 1 crtc_state->dsb_commit 0
PARAM_VALUE 1 crtc_state->dsc.config.mux_word_size 0
PARAM_VALUE 1 crtc_state->dsc.config.rc_bits 0
PARAM_VALUE 1 crtc_state->dsc.config.rc_edge_factor 0
PARAM_VALUE 1 crtc_state->dsc.config.slice_count 0
PARAM_VALUE 1 crtc_state->dsc.slice_config.streams_per_pipe 0-3
PARAM_VALUE 1 crtc_state->dsi_pll.ctrl 0
PARAM_VALUE 1 crtc_state->dsi_pll.div 0
PARAM_VALUE 1 crtc_state->enable_psr2_sel_fetch 0
PARAM_VALUE 1 crtc_state->enable_psr2_su_region_et 0
PARAM_VALUE 1 crtc_state->enabled_planes 0
PARAM_VALUE 1 crtc_state->enhanced_framing 0
PARAM_VALUE 1 crtc_state->entry_setup_frames 0
PARAM_VALUE 1 crtc_state->fb_bits 0
PARAM_VALUE 1 crtc_state->fdi_lanes 0-1
PARAM_VALUE 1 crtc_state->fec_enable 0
PARAM_VALUE 1 crtc_state->fifo_changed 0
PARAM_VALUE 1 crtc_state->gmch_pfit.control 0,2147483648-u32max
PARAM_VALUE 1 crtc_state->gmch_pfit.lvds_border_bits 0
PARAM_VALUE 1 crtc_state->has_audio 0
PARAM_VALUE 1 crtc_state->has_drrs 0
PARAM_VALUE 1 crtc_state->has_hdmi_sink 0
PARAM_VALUE 1 crtc_state->has_infoframe 0
PARAM_VALUE 1 crtc_state->has_lobf 0
PARAM_VALUE 1 crtc_state->has_panel_replay 0
PARAM_VALUE 1 crtc_state->has_psr 0
PARAM_VALUE 1 crtc_state->has_sel_update 0
PARAM_VALUE 1 crtc_state->hdmi_high_tmds_clock_ratio 0
PARAM_VALUE 1 crtc_state->hdmi_scrambling 0
PARAM_VALUE 1 crtc_state->hsw_workaround_pipe (-1)
PARAM_VALUE 1 crtc_state->hw.active 1
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.clock 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.crtc_hskew 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.flags 0,16
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.hdisplay 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.head.next 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.head.prev 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.height_mm 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.hskew 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.hsync_end 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.htotal 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.status 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.type 64
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.vdisplay 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.vscan 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.vsync_end 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.vtotal 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.width_mm 0
PARAM_VALUE 1 crtc_state->hw.background_color 0-1073741823
PARAM_VALUE 1 crtc_state->hw.ctm 0
PARAM_VALUE 1 crtc_state->hw.degamma_lut 0
PARAM_VALUE 1 crtc_state->hw.enable 0
PARAM_VALUE 1 crtc_state->hw.gamma_lut 0
PARAM_VALUE 1 crtc_state->hw.mode.type 64
PARAM_VALUE 1 crtc_state->hw.pipe_mode.type 64
PARAM_VALUE 1 crtc_state->hw.scaling_filter 0
PARAM_VALUE 1 crtc_state->hw.sharpness_strength 0
PARAM_VALUE 1 crtc_state->infoframes.as_sdp.length 0
PARAM_VALUE 1 crtc_state->infoframes.as_sdp.mode 0
PARAM_VALUE 1 crtc_state->infoframes.as_sdp.revision 0
PARAM_VALUE 1 crtc_state->infoframes.as_sdp.sdp_type 0
PARAM_VALUE 1 crtc_state->infoframes.as_sdp.target_rr 0
PARAM_VALUE 1 crtc_state->infoframes.as_sdp.vtotal 0
PARAM_VALUE 1 crtc_state->infoframes.avi.any.length 0
PARAM_VALUE 1 crtc_state->infoframes.avi.any.type 0
PARAM_VALUE 1 crtc_state->infoframes.avi.any.version 0
PARAM_VALUE 1 crtc_state->infoframes.avi.audio.length 0
PARAM_VALUE 1 crtc_state->infoframes.avi.audio.type 0
PARAM_VALUE 1 crtc_state->infoframes.avi.avi.itc 0
PARAM_VALUE 1 crtc_state->infoframes.avi.avi.left_bar 0
PARAM_VALUE 1 crtc_state->infoframes.avi.avi.length 0
PARAM_VALUE 1 crtc_state->infoframes.avi.avi.nups 0
PARAM_VALUE 1 crtc_state->infoframes.avi.avi.top_bar 0
PARAM_VALUE 1 crtc_state->infoframes.avi.avi.type 0
PARAM_VALUE 1 crtc_state->infoframes.avi.avi.version 0
PARAM_VALUE 1 crtc_state->infoframes.avi.drm.eotf 0
PARAM_VALUE 1 crtc_state->infoframes.avi.drm.length 0
PARAM_VALUE 1 crtc_state->infoframes.avi.drm.max_cll 0
PARAM_VALUE 1 crtc_state->infoframes.avi.drm.max_fall 0
PARAM_VALUE 1 crtc_state->infoframes.avi.drm.type 0
PARAM_VALUE 1 crtc_state->infoframes.avi.drm.version 0
PARAM_VALUE 1 crtc_state->infoframes.avi.spd.length 0
PARAM_VALUE 1 crtc_state->infoframes.avi.spd.sdi 0
PARAM_VALUE 1 crtc_state->infoframes.avi.spd.type 0
PARAM_VALUE 1 crtc_state->infoframes.avi.spd.version 0
PARAM_VALUE 1 crtc_state->infoframes.drm.any.length 0
PARAM_VALUE 1 crtc_state->infoframes.drm.any.type 0
PARAM_VALUE 1 crtc_state->infoframes.drm.any.version 0
PARAM_VALUE 1 crtc_state->infoframes.drm.audio.length 0
PARAM_VALUE 1 crtc_state->infoframes.drm.audio.type 0
PARAM_VALUE 1 crtc_state->infoframes.drm.avi.itc 0
PARAM_VALUE 1 crtc_state->infoframes.drm.avi.left_bar 0
PARAM_VALUE 1 crtc_state->infoframes.drm.avi.length 0
PARAM_VALUE 1 crtc_state->infoframes.drm.avi.nups 0
PARAM_VALUE 1 crtc_state->infoframes.drm.avi.top_bar 0
PARAM_VALUE 1 crtc_state->infoframes.drm.avi.type 0
PARAM_VALUE 1 crtc_state->infoframes.drm.avi.version 0
PARAM_VALUE 1 crtc_state->infoframes.drm.drm.eotf 0
PARAM_VALUE 1 crtc_state->infoframes.drm.drm.length 0
PARAM_VALUE 1 crtc_state->infoframes.drm.drm.max_cll 0
PARAM_VALUE 1 crtc_state->infoframes.drm.drm.max_fall 0
PARAM_VALUE 1 crtc_state->infoframes.drm.drm.type 0
PARAM_VALUE 1 crtc_state->infoframes.drm.drm.version 0
PARAM_VALUE 1 crtc_state->infoframes.drm.spd.length 0
PARAM_VALUE 1 crtc_state->infoframes.drm.spd.sdi 0
PARAM_VALUE 1 crtc_state->infoframes.drm.spd.type 0
PARAM_VALUE 1 crtc_state->infoframes.drm.spd.version 0
PARAM_VALUE 1 crtc_state->infoframes.enable 0
PARAM_VALUE 1 crtc_state->infoframes.gcp 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.any.length 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.any.type 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.any.version 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.audio.type 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.avi.itc 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.avi.length 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.avi.nups 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.avi.top_bar 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.avi.type 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.avi.version 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.drm.eotf 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.drm.length 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.drm.max_cll 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.drm.type 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.drm.version 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.spd.length 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.spd.sdi 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.spd.type 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.spd.version 0
PARAM_VALUE 1 crtc_state->infoframes.spd.any.length 0
PARAM_VALUE 1 crtc_state->infoframes.spd.any.type 0
PARAM_VALUE 1 crtc_state->infoframes.spd.any.version 0
PARAM_VALUE 1 crtc_state->infoframes.spd.audio.length 0
PARAM_VALUE 1 crtc_state->infoframes.spd.audio.type 0
PARAM_VALUE 1 crtc_state->infoframes.spd.avi.itc 0
PARAM_VALUE 1 crtc_state->infoframes.spd.avi.left_bar 0
PARAM_VALUE 1 crtc_state->infoframes.spd.avi.length 0
PARAM_VALUE 1 crtc_state->infoframes.spd.avi.nups 0
PARAM_VALUE 1 crtc_state->infoframes.spd.avi.top_bar 0
PARAM_VALUE 1 crtc_state->infoframes.spd.avi.type 0
PARAM_VALUE 1 crtc_state->infoframes.spd.avi.version 0
PARAM_VALUE 1 crtc_state->infoframes.spd.drm.eotf 0
PARAM_VALUE 1 crtc_state->infoframes.spd.drm.length 0
PARAM_VALUE 1 crtc_state->infoframes.spd.drm.max_cll 0
PARAM_VALUE 1 crtc_state->infoframes.spd.drm.max_fall 0
PARAM_VALUE 1 crtc_state->infoframes.spd.drm.type 0
PARAM_VALUE 1 crtc_state->infoframes.spd.drm.version 0
PARAM_VALUE 1 crtc_state->infoframes.spd.spd.length 0
PARAM_VALUE 1 crtc_state->infoframes.spd.spd.sdi 0
PARAM_VALUE 1 crtc_state->infoframes.spd.spd.type 0
PARAM_VALUE 1 crtc_state->infoframes.spd.spd.version 0
PARAM_VALUE 1 crtc_state->infoframes.vsc.bpc 0
PARAM_VALUE 1 crtc_state->infoframes.vsc.colorimetry 0
PARAM_VALUE 1 crtc_state->infoframes.vsc.content_type 0
PARAM_VALUE 1 crtc_state->infoframes.vsc.length 0
PARAM_VALUE 1 crtc_state->infoframes.vsc.pixelformat 0
PARAM_VALUE 1 crtc_state->infoframes.vsc.revision 0
PARAM_VALUE 1 crtc_state->infoframes.vsc.sdp_type 0
PARAM_VALUE 1 crtc_state->inherited 0
PARAM_VALUE 1 crtc_state->intel_dpll 0,4096-ptr_max
PARAM_VALUE 1 crtc_state->intel_dpll->info 4096-ptr_max
PARAM_VALUE 1 crtc_state->lane_count 0
PARAM_VALUE 1 crtc_state->lane_lat_optim_mask 0
PARAM_VALUE 1 crtc_state->master_transcoder (-1)
PARAM_VALUE 1 crtc_state->max_link_bpp_x16 s32max
PARAM_VALUE 1 crtc_state->max_pipe_bpp 0
PARAM_VALUE 1 crtc_state->min_cdclk 0
PARAM_VALUE 1 crtc_state->min_voltage_level 0
PARAM_VALUE 1 crtc_state->mode_flags 0,64
PARAM_VALUE 1 crtc_state->mst_master_transcoder (-1)
PARAM_VALUE 1 crtc_state->no_psr_reason 0
PARAM_VALUE 1 crtc_state->nv12_planes 0
PARAM_VALUE 1 crtc_state->output_format 0-2
PARAM_VALUE 1 crtc_state->output_types 0
PARAM_VALUE 1 crtc_state->panel_replay_dsc_support 0
PARAM_VALUE 1 crtc_state->pch_pfit.dst.x1 0
PARAM_VALUE 1 crtc_state->pch_pfit.dst.y1 0
PARAM_VALUE 1 crtc_state->pipe_bpp 0,18,24,30,36
PARAM_VALUE 1 crtc_state->pipe_srcsz_early_tpt 0
PARAM_VALUE 1 crtc_state->pkg_c_latency_used 0
PARAM_VALUE 1 crtc_state->plane_color_changed 0
PARAM_VALUE 1 crtc_state->post_csc_lut 0,4096-ptr_max
PARAM_VALUE 1 crtc_state->post_csc_lut->base.id 0-s32max
PARAM_VALUE 1 crtc_state->post_csc_lut->base.type 3149642683
PARAM_VALUE 1 crtc_state->post_csc_lut->head_file.next 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->post_csc_lut->head_file.next->next 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->post_csc_lut->head_file.prev 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->post_csc_lut->head_file.prev->next 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->post_csc_lut->head_file.prev->prev 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->post_csc_lut->head_global.next 4096-ptr_max
PARAM_VALUE 1 crtc_state->post_csc_lut->length 1032,2048,4096,8192,2097160
PARAM_VALUE 1 crtc_state->pre_csc_lut 0,4096-ptr_max
PARAM_VALUE 1 crtc_state->pre_csc_lut->base.id 0-s32max
PARAM_VALUE 1 crtc_state->pre_csc_lut->base.type 3149642683
PARAM_VALUE 1 crtc_state->pre_csc_lut->head_file.next 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->pre_csc_lut->head_file.next->next 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->pre_csc_lut->head_file.prev 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->pre_csc_lut->head_file.prev->next 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->pre_csc_lut->head_file.prev->prev 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->pre_csc_lut->head_global.next 4096-ptr_max
PARAM_VALUE 1 crtc_state->pre_csc_lut->length 264,1032,4096,8192
PARAM_VALUE 1 crtc_state->preload_luts 0
PARAM_VALUE 1 crtc_state->psr2_man_track_ctl 0
PARAM_VALUE 1 crtc_state->psr2_su_area.x1 0
PARAM_VALUE 1 crtc_state->psr2_su_area.x2 0
PARAM_VALUE 1 crtc_state->psr2_su_area.y1 0
PARAM_VALUE 1 crtc_state->psr2_su_area.y2 0
PARAM_VALUE 1 crtc_state->quirks 0
PARAM_VALUE 1 crtc_state->req_psr2_sdp_prior_scanline 0
PARAM_VALUE 1 crtc_state->scaled_planes 0
PARAM_VALUE 1 crtc_state->scaler_state.scaler_id (-1)-s32max
PARAM_VALUE 1 crtc_state->scaler_state.scaler_users 0,2147483648
PARAM_VALUE 1 crtc_state->sdp_split_enable 0
PARAM_VALUE 1 crtc_state->sdvo_tv_clock 0
PARAM_VALUE 1 crtc_state->sink_format 0-2
PARAM_VALUE 1 crtc_state->splitter.enable 0
PARAM_VALUE 1 crtc_state->splitter.link_count 0
PARAM_VALUE 1 crtc_state->splitter.pixel_overlap 0
PARAM_VALUE 1 crtc_state->su_y_granularity 0
PARAM_VALUE 1 crtc_state->sync_mode_slaves_mask 0
PARAM_VALUE 1 crtc_state->uapi.active 0
PARAM_VALUE 1 crtc_state->uapi.active_changed 0
PARAM_VALUE 1 crtc_state->uapi.adjusted_mode.clock 0
PARAM_VALUE 1 crtc_state->uapi.adjusted_mode.flags 0
PARAM_VALUE 1 crtc_state->uapi.adjusted_mode.hdisplay 0
PARAM_VALUE 1 crtc_state->uapi.adjusted_mode.hskew 0
PARAM_VALUE 1 crtc_state->uapi.adjusted_mode.htotal 0
PARAM_VALUE 1 crtc_state->uapi.adjusted_mode.status 0
PARAM_VALUE 1 crtc_state->uapi.adjusted_mode.type 0
PARAM_VALUE 1 crtc_state->uapi.adjusted_mode.vdisplay 0
PARAM_VALUE 1 crtc_state->uapi.adjusted_mode.vscan 0
PARAM_VALUE 1 crtc_state->uapi.adjusted_mode.vtotal 0
PARAM_VALUE 1 crtc_state->uapi.adjusted_mode.width_mm 0
PARAM_VALUE 1 crtc_state->uapi.async_flip 0
PARAM_VALUE 1 crtc_state->uapi.background_color 18446462598732840960
PARAM_VALUE 1 crtc_state->uapi.color_mgmt_changed 0
PARAM_VALUE 1 crtc_state->uapi.commit 0
PARAM_VALUE 1 crtc_state->uapi.connector_mask 0
PARAM_VALUE 1 crtc_state->uapi.connectors_changed 0
PARAM_VALUE 1 crtc_state->uapi.crtc 4096-ptr_max
PARAM_VALUE 1 crtc_state->uapi.ctm 0
PARAM_VALUE 1 crtc_state->uapi.degamma_lut 0
PARAM_VALUE 1 crtc_state->uapi.enable 0
PARAM_VALUE 1 crtc_state->uapi.encoder_mask 0
PARAM_VALUE 1 crtc_state->uapi.event 0
PARAM_VALUE 1 crtc_state->uapi.gamma_lut 0
PARAM_VALUE 1 crtc_state->uapi.mode.clock 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_clock 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_hblank_end 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_hblank_start 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_hdisplay 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_hskew 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_hsync_end 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_hsync_start 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_htotal 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_vblank_end 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_vblank_start 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_vdisplay 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_vsync_end 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_vsync_start 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_vtotal 0
PARAM_VALUE 1 crtc_state->uapi.mode.flags 0
PARAM_VALUE 1 crtc_state->uapi.mode.hdisplay 0
PARAM_VALUE 1 crtc_state->uapi.mode.head.next 0
PARAM_VALUE 1 crtc_state->uapi.mode.head.prev 0
PARAM_VALUE 1 crtc_state->uapi.mode.height_mm 0
PARAM_VALUE 1 crtc_state->uapi.mode.hskew 0
PARAM_VALUE 1 crtc_state->uapi.mode.hsync_end 0
PARAM_VALUE 1 crtc_state->uapi.mode.hsync_start 0
PARAM_VALUE 1 crtc_state->uapi.mode.htotal 0
PARAM_VALUE 1 crtc_state->uapi.mode.status 0
PARAM_VALUE 1 crtc_state->uapi.mode.type 0
PARAM_VALUE 1 crtc_state->uapi.mode.vdisplay 0
PARAM_VALUE 1 crtc_state->uapi.mode.vscan 0
PARAM_VALUE 1 crtc_state->uapi.mode.vsync_end 0
PARAM_VALUE 1 crtc_state->uapi.mode.vsync_start 0
PARAM_VALUE 1 crtc_state->uapi.mode.vtotal 0
PARAM_VALUE 1 crtc_state->uapi.mode.width_mm 0
PARAM_VALUE 1 crtc_state->uapi.mode_blob 0
PARAM_VALUE 1 crtc_state->uapi.mode_changed 0
PARAM_VALUE 1 crtc_state->uapi.no_vblank 0
PARAM_VALUE 1 crtc_state->uapi.plane_mask 0
PARAM_VALUE 1 crtc_state->uapi.planes_changed 0
PARAM_VALUE 1 crtc_state->uapi.scaling_filter 0
PARAM_VALUE 1 crtc_state->uapi.self_refresh_active 0
PARAM_VALUE 1 crtc_state->uapi.sharpness_strength 0
PARAM_VALUE 1 crtc_state->uapi.state 0
PARAM_VALUE 1 crtc_state->uapi.target_vblank 0
PARAM_VALUE 1 crtc_state->uapi.vrr_enabled 0
PARAM_VALUE 1 crtc_state->uapi.zpos_changed 0
PARAM_VALUE 1 crtc_state->update_lrr 0
PARAM_VALUE 1 crtc_state->update_m_n 0
PARAM_VALUE 1 crtc_state->update_pipe 0
PARAM_VALUE 1 crtc_state->update_planes 0
PARAM_VALUE 1 crtc_state->update_wm_post 0
PARAM_VALUE 1 crtc_state->update_wm_pre 0
PARAM_VALUE 1 crtc_state->use_dsb 0
PARAM_VALUE 1 crtc_state->use_flipq 0
PARAM_VALUE 1 crtc_state->vblank_work.base.canceling 0
PARAM_VALUE 1 crtc_state->vblank_work.base.func 0
PARAM_VALUE 1 crtc_state->vblank_work.base.node.next 0
PARAM_VALUE 1 crtc_state->vblank_work.base.node.prev 0
PARAM_VALUE 1 crtc_state->vblank_work.base.worker 0
PARAM_VALUE 1 crtc_state->vblank_work.cancelling 0
PARAM_VALUE 1 crtc_state->vblank_work.count 0
PARAM_VALUE 1 crtc_state->vblank_work.node.next 0
PARAM_VALUE 1 crtc_state->vblank_work.node.prev 0
PARAM_VALUE 1 crtc_state->vblank_work.vblank 0
PARAM_VALUE 1 crtc_state->vrr.dc_balance.enable 0
PARAM_VALUE 1 crtc_state->vrr.in_range 0
PARAM_VALUE 1 crtc_state->wm.g4x.intermediate.cxsr 0
PARAM_VALUE 1 crtc_state->wm.g4x.intermediate.fbc_en 0
PARAM_VALUE 1 crtc_state->wm.g4x.intermediate.hpll_en 0
PARAM_VALUE 1 crtc_state->wm.g4x.intermediate.sr.fbc 0
PARAM_VALUE 1 crtc_state->wm.g4x.intermediate.wm.fbc 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.cxsr 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.fbc_en 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.hpll.cursor 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.hpll.fbc 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.hpll.plane 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.hpll_en 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.sr.cursor 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.sr.fbc 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.sr.plane 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.wm.fbc 0
PARAM_VALUE 1 crtc_state->wm.ilk.optimal.pipe_enabled 0
PARAM_VALUE 1 crtc_state->wm.need_postvbl_update 0
PARAM_VALUE 1 crtc_state->wm.skl.ddb.end 0
PARAM_VALUE 1 crtc_state->wm.skl.ddb.start 0
PARAM_VALUE 1 crtc_state->wm.skl.optimal.use_sagv_wm 0
PARAM_VALUE 1 crtc_state->wm.skl.raw.use_sagv_wm 0
PARAM_VALUE 1 crtc_state->wm.vlv.intermediate.cxsr 0
PARAM_VALUE 1 crtc_state->wm.vlv.optimal.cxsr 0
PARAM_VALUE 1 crtc_state->wm.vlv.optimal.num_levels 0
PARAM_VALUE 1 crtc_state->wm_level_disabled 0
PARAM_VALUE 1 *crtc_state->hw.adjusted_mode->name 0-255
PARAM_VALUE 1 *crtc_state->hw.mode->name 0-255
PARAM_VALUE 1 *crtc_state->hw.pipe_mode->name 0-255
BUF_SIZE 0 encoder 728
BUF_SIZE 1 crtc_state 4832
DATA_SOURCE 0 encoder $0
DATA_SOURCE 1 crtc_state r intel_crtc_state_alloc
FUZZY_MAX 0 encoder->pipe_mask 255
BIT_INFO 0 encoder->disable 0x40080000000000,0x5dfdfff5ffffe000
HARD_MAX 0 encoder->pipe_mask 255
HARD_MAX 0 encoder->power_domain 43
HARD_MAX 0 encoder->type 9
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 1 crtc_state->cgm_mode 0-u32max
HOST_DATA 1 crtc_state->csc_mode 0-u32max
HOST_DATA 1 crtc_state->dsc.config.block_pred_enable 0-1
HOST_DATA 1 crtc_state->dsc.config.convert_rgb 0-1
HOST_DATA 1 crtc_state->dsc.config.native_422 0-1
HOST_DATA 1 crtc_state->dsc.config.simple_422 0-1
HOST_DATA 1 crtc_state->dsc.config.vbr_enable 0-1
HOST_DATA 1 crtc_state->fdi_m_n.link_n 0-16777215
HOST_DATA 1 crtc_state->gamma_mode 0-u32max
HOST_DATA 1 crtc_state->gmch_pfit.pgm_ratios 0-u32max
HOST_DATA 1 crtc_state->hw.background_color 0-1073741823
HOST_DATA 1 crtc_state->ips_enabled 0-1
HOST_DATA 1 crtc_state->min_hblank 0-s32max
HOST_DATA 1 crtc_state->set_context_latency 0-u16max
HOST_DATA 1 crtc_state->vrr.cmrr.cmrr_m 0-u64max
HOST_DATA 1 crtc_state->vrr.cmrr.cmrr_n 0-u64max
HOST_DATA 1 crtc_state->vrr.dc_balance.guardband 0-u16max
HOST_DATA 1 crtc_state->vrr.dc_balance.max_decrease 0-u16max
HOST_DATA 1 crtc_state->vrr.dc_balance.max_increase 0-u16max
HOST_DATA 1 crtc_state->vrr.dc_balance.slope 0-u16max
HOST_DATA 1 crtc_state->vrr.dc_balance.vblank_target 0-u16max
NO_OVERFLOW_SIMPLE 1 crtc_state->post_csc_lut->dev->num_crtcs
NO_OVERFLOW_SIMPLE 1 crtc_state->pre_csc_lut->dev->num_crtcs

drivers/gpu/drm/i915/display/intel_modeset_verify.c verify_crtc_state() -> intel_encoder_get_config()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 0 encoder->base.crtc 0,4096-ptr_max
PARAM_VALUE 1 crtc_state 4096-ptr_max
PARAM_VALUE 1 crtc_state->active_non_psr_pipes 0
PARAM_VALUE 1 crtc_state->active_planes 0
PARAM_VALUE 1 crtc_state->alpm_state.io_wake_lines 0
PARAM_VALUE 1 crtc_state->async_flip_planes 0
PARAM_VALUE 1 crtc_state->bw_constrained 0
PARAM_VALUE 1 crtc_state->c8_planes 0
PARAM_VALUE 1 crtc_state->clock_set 0
PARAM_VALUE 1 crtc_state->crc_enabled 0
PARAM_VALUE 1 crtc_state->disable_cxsr 0
PARAM_VALUE 1 crtc_state->dither 0
PARAM_VALUE 1 crtc_state->dither_force_disable 0
PARAM_VALUE 1 crtc_state->do_async_flip 0
PARAM_VALUE 1 crtc_state->dp_m2_n2.data_m 0
PARAM_VALUE 1 crtc_state->dp_m2_n2.data_n 0
PARAM_VALUE 1 crtc_state->dp_m2_n2.link_m 0
PARAM_VALUE 1 crtc_state->dp_m2_n2.link_n 0
PARAM_VALUE 1 crtc_state->dp_m2_n2.tu 0
PARAM_VALUE 1 crtc_state->dp_m_n.data_m 0
PARAM_VALUE 1 crtc_state->dp_m_n.data_n 0
PARAM_VALUE 1 crtc_state->dp_m_n.link_m 0
PARAM_VALUE 1 crtc_state->dp_m_n.link_n 0
PARAM_VALUE 1 crtc_state->dp_m_n.tu 0
PARAM_VALUE 1 crtc_state->dp_tunnel_ref.tracker 0
PARAM_VALUE 1 crtc_state->dp_tunnel_ref.tunnel 0
PARAM_VALUE 1 crtc_state->dpll.dot 0
PARAM_VALUE 1 crtc_state->dpll.m 0
PARAM_VALUE 1 crtc_state->dpll.m1 0
PARAM_VALUE 1 crtc_state->dpll.m2 0
PARAM_VALUE 1 crtc_state->dpll.n 0
PARAM_VALUE 1 crtc_state->dpll.p 0
PARAM_VALUE 1 crtc_state->dpll.p1 0
PARAM_VALUE 1 crtc_state->dpll.p2 0
PARAM_VALUE 1 crtc_state->dpll.vco 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.ebb0 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.ebb4 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.pll0 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.pll1 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.pll10 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.pll2 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.pll3 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.pll6 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.pll8 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.bxt.pll9 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.hsw.spll 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.hsw.wrpll 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.icl.cfgcr0 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.icl.cfgcr1 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.icl.div0 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.skl.cfgcr1 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.skl.cfgcr2 0
PARAM_VALUE 1 crtc_state->dpll_hw_state.skl.ctrl1 0
PARAM_VALUE 1 crtc_state->dsb_color 0
PARAM_VALUE 1 crtc_state->dsb_commit 0
PARAM_VALUE 1 crtc_state->dsc.config.mux_word_size 0
PARAM_VALUE 1 crtc_state->dsc.config.rc_bits 0
PARAM_VALUE 1 crtc_state->dsc.config.slice_count 0
PARAM_VALUE 1 crtc_state->dsc.slice_config.streams_per_pipe 0-3
PARAM_VALUE 1 crtc_state->dsi_pll.ctrl 0
PARAM_VALUE 1 crtc_state->dsi_pll.div 0
PARAM_VALUE 1 crtc_state->enable_psr2_sel_fetch 0
PARAM_VALUE 1 crtc_state->enable_psr2_su_region_et 0
PARAM_VALUE 1 crtc_state->enabled_planes 0
PARAM_VALUE 1 crtc_state->enhanced_framing 0
PARAM_VALUE 1 crtc_state->entry_setup_frames 0
PARAM_VALUE 1 crtc_state->fb_bits 0
PARAM_VALUE 1 crtc_state->fdi_lanes 0-1
PARAM_VALUE 1 crtc_state->fec_enable 0
PARAM_VALUE 1 crtc_state->fifo_changed 0
PARAM_VALUE 1 crtc_state->gmch_pfit.control 0,2147483648-u32max
PARAM_VALUE 1 crtc_state->has_audio 0
PARAM_VALUE 1 crtc_state->has_drrs 0
PARAM_VALUE 1 crtc_state->has_hdmi_sink 0
PARAM_VALUE 1 crtc_state->has_infoframe 0
PARAM_VALUE 1 crtc_state->has_lobf 0
PARAM_VALUE 1 crtc_state->has_panel_replay 0
PARAM_VALUE 1 crtc_state->has_psr 0
PARAM_VALUE 1 crtc_state->has_sel_update 0
PARAM_VALUE 1 crtc_state->hdmi_scrambling 0
PARAM_VALUE 1 crtc_state->hsw_workaround_pipe (-1)
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.clock 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.flags 0,16
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.hskew 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.htotal 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.status 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.type 0,64
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.vscan 0
PARAM_VALUE 1 crtc_state->hw.adjusted_mode.vtotal 0
PARAM_VALUE 1 crtc_state->hw.background_color 0-1073741823
PARAM_VALUE 1 crtc_state->hw.ctm 0
PARAM_VALUE 1 crtc_state->hw.degamma_lut 0
PARAM_VALUE 1 crtc_state->hw.gamma_lut 0
PARAM_VALUE 1 crtc_state->hw.mode.type 0,64
PARAM_VALUE 1 crtc_state->hw.pipe_mode.type 0,64
PARAM_VALUE 1 crtc_state->hw.scaling_filter 0
PARAM_VALUE 1 crtc_state->hw.sharpness_strength 0
PARAM_VALUE 1 crtc_state->infoframes.as_sdp.length 0
PARAM_VALUE 1 crtc_state->infoframes.as_sdp.mode 0
PARAM_VALUE 1 crtc_state->infoframes.as_sdp.vtotal 0
PARAM_VALUE 1 crtc_state->infoframes.avi.any.type 0
PARAM_VALUE 1 crtc_state->infoframes.avi.avi.itc 0
PARAM_VALUE 1 crtc_state->infoframes.avi.avi.nups 0
PARAM_VALUE 1 crtc_state->infoframes.avi.avi.type 0
PARAM_VALUE 1 crtc_state->infoframes.avi.drm.eotf 0
PARAM_VALUE 1 crtc_state->infoframes.avi.drm.type 0
PARAM_VALUE 1 crtc_state->infoframes.avi.spd.sdi 0
PARAM_VALUE 1 crtc_state->infoframes.avi.spd.type 0
PARAM_VALUE 1 crtc_state->infoframes.drm.any.type 0
PARAM_VALUE 1 crtc_state->infoframes.drm.avi.itc 0
PARAM_VALUE 1 crtc_state->infoframes.drm.avi.nups 0
PARAM_VALUE 1 crtc_state->infoframes.drm.avi.type 0
PARAM_VALUE 1 crtc_state->infoframes.drm.drm.eotf 0
PARAM_VALUE 1 crtc_state->infoframes.drm.drm.type 0
PARAM_VALUE 1 crtc_state->infoframes.drm.spd.sdi 0
PARAM_VALUE 1 crtc_state->infoframes.drm.spd.type 0
PARAM_VALUE 1 crtc_state->infoframes.enable 0
PARAM_VALUE 1 crtc_state->infoframes.gcp 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.any.type 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.avi.itc 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.avi.nups 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.avi.type 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.drm.eotf 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.drm.type 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.spd.sdi 0
PARAM_VALUE 1 crtc_state->infoframes.hdmi.spd.type 0
PARAM_VALUE 1 crtc_state->infoframes.spd.any.type 0
PARAM_VALUE 1 crtc_state->infoframes.spd.avi.itc 0
PARAM_VALUE 1 crtc_state->infoframes.spd.avi.nups 0
PARAM_VALUE 1 crtc_state->infoframes.spd.avi.type 0
PARAM_VALUE 1 crtc_state->infoframes.spd.drm.eotf 0
PARAM_VALUE 1 crtc_state->infoframes.spd.drm.type 0
PARAM_VALUE 1 crtc_state->infoframes.spd.spd.sdi 0
PARAM_VALUE 1 crtc_state->infoframes.spd.spd.type 0
PARAM_VALUE 1 crtc_state->infoframes.vsc.bpc 0
PARAM_VALUE 1 crtc_state->infoframes.vsc.length 0
PARAM_VALUE 1 crtc_state->infoframes.vsc.revision 0
PARAM_VALUE 1 crtc_state->infoframes.vsc.sdp_type 0
PARAM_VALUE 1 crtc_state->inherited 0
PARAM_VALUE 1 crtc_state->intel_dpll 0,4096-ptr_max
PARAM_VALUE 1 crtc_state->intel_dpll->info 4096-ptr_max
PARAM_VALUE 1 crtc_state->lane_count 0
PARAM_VALUE 1 crtc_state->lane_lat_optim_mask 0
PARAM_VALUE 1 crtc_state->master_transcoder (-1)
PARAM_VALUE 1 crtc_state->max_link_bpp_x16 s32max
PARAM_VALUE 1 crtc_state->max_pipe_bpp 0
PARAM_VALUE 1 crtc_state->min_cdclk 0
PARAM_VALUE 1 crtc_state->min_voltage_level 0
PARAM_VALUE 1 crtc_state->mode_flags 0,64
PARAM_VALUE 1 crtc_state->mst_master_transcoder (-1)
PARAM_VALUE 1 crtc_state->no_psr_reason 0
PARAM_VALUE 1 crtc_state->nv12_planes 0
PARAM_VALUE 1 crtc_state->output_format 0-2
PARAM_VALUE 1 crtc_state->output_types 0
PARAM_VALUE 1 crtc_state->panel_replay_dsc_support 0
PARAM_VALUE 1 crtc_state->pch_pfit.dst.x1 0
PARAM_VALUE 1 crtc_state->pch_pfit.dst.y1 0
PARAM_VALUE 1 crtc_state->pipe_bpp 0,18,24,30,36
PARAM_VALUE 1 crtc_state->pipe_srcsz_early_tpt 0
PARAM_VALUE 1 crtc_state->pkg_c_latency_used 0
PARAM_VALUE 1 crtc_state->plane_color_changed 0
PARAM_VALUE 1 crtc_state->post_csc_lut 0,4096-ptr_max
PARAM_VALUE 1 crtc_state->post_csc_lut->base.id 0-s32max
PARAM_VALUE 1 crtc_state->post_csc_lut->base.type 3149642683
PARAM_VALUE 1 crtc_state->post_csc_lut->head_file.next 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->post_csc_lut->head_file.next->next 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->post_csc_lut->head_file.prev 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->post_csc_lut->head_file.prev->next 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->post_csc_lut->head_file.prev->prev 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->post_csc_lut->head_global.next->prev 4096-ptr_max
PARAM_VALUE 1 crtc_state->post_csc_lut->length 1032,2048,4096,8192,2097160
PARAM_VALUE 1 crtc_state->pre_csc_lut 0,4096-ptr_max
PARAM_VALUE 1 crtc_state->pre_csc_lut->base.id 0-s32max
PARAM_VALUE 1 crtc_state->pre_csc_lut->base.type 3149642683
PARAM_VALUE 1 crtc_state->pre_csc_lut->head_file.next 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->pre_csc_lut->head_file.next->next 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->pre_csc_lut->head_file.prev 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->pre_csc_lut->head_file.prev->next 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->pre_csc_lut->head_file.prev->prev 72,4096-ptr_max
PARAM_VALUE 1 crtc_state->pre_csc_lut->head_global.next->prev 4096-ptr_max
PARAM_VALUE 1 crtc_state->pre_csc_lut->length 264,1032,4096,8192
PARAM_VALUE 1 crtc_state->preload_luts 0
PARAM_VALUE 1 crtc_state->psr2_man_track_ctl 0
PARAM_VALUE 1 crtc_state->psr2_su_area.x1 0
PARAM_VALUE 1 crtc_state->psr2_su_area.x2 0
PARAM_VALUE 1 crtc_state->psr2_su_area.y1 0
PARAM_VALUE 1 crtc_state->psr2_su_area.y2 0
PARAM_VALUE 1 crtc_state->quirks 0
PARAM_VALUE 1 crtc_state->scaled_planes 0
PARAM_VALUE 1 crtc_state->scaler_state.scaler_id (-1)-s32max
PARAM_VALUE 1 crtc_state->scaler_state.scaler_users 0,2147483648
PARAM_VALUE 1 crtc_state->sdp_split_enable 0
PARAM_VALUE 1 crtc_state->sdvo_tv_clock 0
PARAM_VALUE 1 crtc_state->sink_format 0-2
PARAM_VALUE 1 crtc_state->splitter.enable 0
PARAM_VALUE 1 crtc_state->splitter.link_count 0
PARAM_VALUE 1 crtc_state->splitter.pixel_overlap 0
PARAM_VALUE 1 crtc_state->su_y_granularity 0
PARAM_VALUE 1 crtc_state->sync_mode_slaves_mask 0
PARAM_VALUE 1 crtc_state->uapi.active 0
PARAM_VALUE 1 crtc_state->uapi.active_changed 0
PARAM_VALUE 1 crtc_state->uapi.adjusted_mode.clock 0
PARAM_VALUE 1 crtc_state->uapi.adjusted_mode.flags 0
PARAM_VALUE 1 crtc_state->uapi.adjusted_mode.hskew 0
PARAM_VALUE 1 crtc_state->uapi.adjusted_mode.type 0
PARAM_VALUE 1 crtc_state->uapi.adjusted_mode.vscan 0
PARAM_VALUE 1 crtc_state->uapi.async_flip 0
PARAM_VALUE 1 crtc_state->uapi.background_color 18446462598732840960
PARAM_VALUE 1 crtc_state->uapi.color_mgmt_changed 0
PARAM_VALUE 1 crtc_state->uapi.commit 0
PARAM_VALUE 1 crtc_state->uapi.connector_mask 0
PARAM_VALUE 1 crtc_state->uapi.connectors_changed 0
PARAM_VALUE 1 crtc_state->uapi.crtc 4096-ptr_max
PARAM_VALUE 1 crtc_state->uapi.ctm 0
PARAM_VALUE 1 crtc_state->uapi.degamma_lut 0
PARAM_VALUE 1 crtc_state->uapi.enable 0
PARAM_VALUE 1 crtc_state->uapi.encoder_mask 0
PARAM_VALUE 1 crtc_state->uapi.event 0
PARAM_VALUE 1 crtc_state->uapi.gamma_lut 0
PARAM_VALUE 1 crtc_state->uapi.mode.clock 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_clock 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_hdisplay 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_hskew 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_hsync_end 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_htotal 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_vdisplay 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_vsync_end 0
PARAM_VALUE 1 crtc_state->uapi.mode.crtc_vtotal 0
PARAM_VALUE 1 crtc_state->uapi.mode.flags 0
PARAM_VALUE 1 crtc_state->uapi.mode.hdisplay 0
PARAM_VALUE 1 crtc_state->uapi.mode.head.next 0
PARAM_VALUE 1 crtc_state->uapi.mode.head.prev 0
PARAM_VALUE 1 crtc_state->uapi.mode.height_mm 0
PARAM_VALUE 1 crtc_state->uapi.mode.hskew 0
PARAM_VALUE 1 crtc_state->uapi.mode.hsync_end 0
PARAM_VALUE 1 crtc_state->uapi.mode.hsync_start 0
PARAM_VALUE 1 crtc_state->uapi.mode.htotal 0
PARAM_VALUE 1 crtc_state->uapi.mode.status 0
PARAM_VALUE 1 crtc_state->uapi.mode.type 0
PARAM_VALUE 1 crtc_state->uapi.mode.vdisplay 0
PARAM_VALUE 1 crtc_state->uapi.mode.vscan 0
PARAM_VALUE 1 crtc_state->uapi.mode.vsync_end 0
PARAM_VALUE 1 crtc_state->uapi.mode.vsync_start 0
PARAM_VALUE 1 crtc_state->uapi.mode.vtotal 0
PARAM_VALUE 1 crtc_state->uapi.mode.width_mm 0
PARAM_VALUE 1 crtc_state->uapi.mode_blob 0
PARAM_VALUE 1 crtc_state->uapi.mode_changed 0
PARAM_VALUE 1 crtc_state->uapi.no_vblank 0
PARAM_VALUE 1 crtc_state->uapi.plane_mask 0
PARAM_VALUE 1 crtc_state->uapi.planes_changed 0
PARAM_VALUE 1 crtc_state->uapi.scaling_filter 0
PARAM_VALUE 1 crtc_state->uapi.self_refresh_active 0
PARAM_VALUE 1 crtc_state->uapi.sharpness_strength 0
PARAM_VALUE 1 crtc_state->uapi.state 0
PARAM_VALUE 1 crtc_state->uapi.target_vblank 0
PARAM_VALUE 1 crtc_state->uapi.vrr_enabled 0
PARAM_VALUE 1 crtc_state->uapi.zpos_changed 0
PARAM_VALUE 1 crtc_state->update_lrr 0
PARAM_VALUE 1 crtc_state->update_m_n 0
PARAM_VALUE 1 crtc_state->update_pipe 0
PARAM_VALUE 1 crtc_state->update_planes 0
PARAM_VALUE 1 crtc_state->update_wm_post 0
PARAM_VALUE 1 crtc_state->update_wm_pre 0
PARAM_VALUE 1 crtc_state->use_dsb 0
PARAM_VALUE 1 crtc_state->use_flipq 0
PARAM_VALUE 1 crtc_state->vblank_work.base.func 0
PARAM_VALUE 1 crtc_state->vblank_work.base.worker 0
PARAM_VALUE 1 crtc_state->vblank_work.cancelling 0
PARAM_VALUE 1 crtc_state->vblank_work.count 0
PARAM_VALUE 1 crtc_state->vblank_work.node.next 0
PARAM_VALUE 1 crtc_state->vblank_work.node.prev 0
PARAM_VALUE 1 crtc_state->vblank_work.vblank 0
PARAM_VALUE 1 crtc_state->vrr.cmrr.cmrr_m 0
PARAM_VALUE 1 crtc_state->vrr.cmrr.cmrr_n 0
PARAM_VALUE 1 crtc_state->vrr.cmrr.enable 0
PARAM_VALUE 1 crtc_state->vrr.dc_balance.enable 0
PARAM_VALUE 1 crtc_state->vrr.in_range 0
PARAM_VALUE 1 crtc_state->wm.g4x.intermediate.cxsr 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.cxsr 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.fbc_en 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.hpll.fbc 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.hpll_en 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.sr.cursor 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.sr.fbc 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.sr.plane 0
PARAM_VALUE 1 crtc_state->wm.g4x.optimal.wm.fbc 0
PARAM_VALUE 1 crtc_state->wm.need_postvbl_update 0
PARAM_VALUE 1 crtc_state->wm.skl.ddb.end 0
PARAM_VALUE 1 crtc_state->wm.skl.ddb.start 0
PARAM_VALUE 1 crtc_state->wm.skl.raw.use_sagv_wm 0
PARAM_VALUE 1 crtc_state->wm.vlv.intermediate.cxsr 0
PARAM_VALUE 1 crtc_state->wm.vlv.optimal.cxsr 0
PARAM_VALUE 1 crtc_state->wm_level_disabled 0
BUF_SIZE 1 crtc_state 4832
CAPPED_DATA 0 encoder->base.crtc 1
CAPPED_DATA 0 &encoder->base.head 1
DATA_SOURCE 1 crtc_state r intel_crtc_state_alloc
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 1 crtc_state->cgm_mode 0-u32max
HOST_DATA 1 crtc_state->cmrr.cmrr_m s64min-s64max
HOST_DATA 1 crtc_state->cmrr.cmrr_n s64min-s64max
HOST_DATA 1 crtc_state->csc_mode 0-u32max
HOST_DATA 1 crtc_state->dsc.config.block_pred_enable 0-1
HOST_DATA 1 crtc_state->dsc.config.convert_rgb 0-1
HOST_DATA 1 crtc_state->dsc.config.native_422 0-1
HOST_DATA 1 crtc_state->dsc.config.simple_422 0-1
HOST_DATA 1 crtc_state->dsc.config.vbr_enable 0-1
HOST_DATA 1 crtc_state->fdi_m_n.link_n 0-16777215
HOST_DATA 1 crtc_state->gamma_mode 0-u32max
HOST_DATA 1 crtc_state->gmch_pfit.pgm_ratios 0-u32max
HOST_DATA 1 crtc_state->hw.adjusted_mode.clock 0[c]
HOST_DATA 1 crtc_state->hw.adjusted_mode.crtc_vblank_start 0-u16max
HOST_DATA 1 crtc_state->hw.background_color 0-1073741823
HOST_DATA 1 crtc_state->hw.mode.clock s32min-s32max[c]
HOST_DATA 1 crtc_state->hw.mode.crtc_clock s32min-s32max[c]
HOST_DATA 1 crtc_state->hw.mode.crtc_vblank_start 0-u16max
HOST_DATA 1 crtc_state->hw.pipe_mode.clock s32min-s32max[c]
HOST_DATA 1 crtc_state->hw.pipe_mode.crtc_clock s32min-s32max[c]
HOST_DATA 1 crtc_state->hw.pipe_mode.crtc_vblank_start 0-u16max
HOST_DATA 1 crtc_state->ips_enabled 0-1
HOST_DATA 1 crtc_state->min_hblank 0-s32max
HOST_DATA 1 crtc_state->pixel_rate 0-u32max[c]
HOST_DATA 1 crtc_state->pixel_rate_cdclk 0-u32max[c]
HOST_DATA 1 crtc_state->set_context_latency 0-u16max
HOST_DATA 1 crtc_state->vrr.dc_balance.guardband 0-u16max
HOST_DATA 1 crtc_state->vrr.dc_balance.max_decrease 0-u16max
HOST_DATA 1 crtc_state->vrr.dc_balance.max_increase 0-u16max
HOST_DATA 1 crtc_state->vrr.dc_balance.slope 0-u16max
HOST_DATA 1 crtc_state->vrr.dc_balance.vblank_target 0-u16max
NO_OVERFLOW_SIMPLE 1 crtc_state->post_csc_lut->dev->num_crtcs
NO_OVERFLOW_SIMPLE 1 crtc_state->pre_csc_lut->dev->num_crtcs
HALF_LOCKED2 &pool->lock