Defined in 1 files as a function:
Referenced in 1 files:
Smatch caller information:
drivers/gpu/drm/i915/display/intel_flipq.c lnl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 3 |
| PARAM_VALUE | 3 | i | 0 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| DATA_SOURCE | 2 | data | $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 2 | data | 0-u32max |
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c lnl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 3 |
| PARAM_VALUE | 3 | i | 1 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c lnl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 3 |
| PARAM_VALUE | 3 | i | 2 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| BIT_INFO | 2 | data | 0x80000000,0xffffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c lnl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 3 |
| PARAM_VALUE | 2 | data | 0 |
| PARAM_VALUE | 3 | i | 3 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c lnl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 3 |
| PARAM_VALUE | 2 | data | 0 |
| PARAM_VALUE | 3 | i | 4 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c lnl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 3 |
| PARAM_VALUE | 2 | data | 0 |
| PARAM_VALUE | 3 | i | 5 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c lnl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 0-2 |
| PARAM_VALUE | 3 | i | 0 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| DATA_SOURCE | 2 | data | $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 2 | data | 0-u32max |
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c lnl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 0-2 |
| PARAM_VALUE | 3 | i | 1 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c lnl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 0-2 |
| PARAM_VALUE | 3 | i | 2 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| BIT_INFO | 2 | data | 0x80000000,0xffffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c lnl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 0-2 |
| PARAM_VALUE | 2 | data | 0 |
| PARAM_VALUE | 3 | i | 3 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c ptl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 3 |
| PARAM_VALUE | 3 | i | 0 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| DATA_SOURCE | 2 | data | $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 2 | data | 0-u32max |
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c ptl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 3 |
| PARAM_VALUE | 2 | data | 0 |
| PARAM_VALUE | 3 | i | 1 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c ptl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 3 |
| PARAM_VALUE | 3 | i | 2 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| BIT_INFO | 2 | data | 0x80000000,0x83ffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c ptl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 3 |
| PARAM_VALUE | 3 | i | 3 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c ptl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 3 |
| PARAM_VALUE | 2 | data | 0 |
| PARAM_VALUE | 3 | i | 4 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c ptl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 3 |
| PARAM_VALUE | 2 | data | 0 |
| PARAM_VALUE | 3 | i | 5 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c ptl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 0-2 |
| PARAM_VALUE | 3 | i | 0 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| DATA_SOURCE | 2 | data | $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 2 | data | 0-u32max |
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c ptl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 0-2 |
| PARAM_VALUE | 2 | data | 0 |
| PARAM_VALUE | 3 | i | 1 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c ptl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 0-2 |
| PARAM_VALUE | 3 | i | 2 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| BIT_INFO | 2 | data | 0x80000000,0x83ffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_flipq.c ptl_flipq_add() -> intel_flipq_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq | 4096-ptr_max |
| PARAM_VALUE | 1 | flipq->flipq_id | 0-2 |
| PARAM_VALUE | 3 | i | 3 |
| BUF_SIZE | 1 | flipq | 60 |
| BUF_SIZE | 1 | flipq | 60 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | flipq | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HALF_LOCKED2 | &pool->lock |