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Defined in 1 files as a function:

Referenced in 4 files:

Smatch caller information:

drivers/gpu/drm/i915/gt/gen6_engine_cs.c gen6_emit_breadcrumb_rcs() -> intel_gt_scratch_offset()

Type Parameter Key Value
PARAM_VALUE 1 field 0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &ce->timeline->mutex
HALF_LOCKED2 &engine->sched_engine->lock
HALF_LOCKED2 irq

drivers/gpu/drm/i915/gt/gen6_engine_cs.c gen6_emit_flush_rcs() -> intel_gt_scratch_offset()

Type Parameter Key Value
PARAM_VALUE 1 field 128
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pxp->tee_mutex
HALF_LOCKED2 &vgpu->vgpu_lock
HALF_LOCKED2 __flags
HALF_LOCKED2 obj->base.resv
HALF_LOCKED2 pkt->bb_vma->obj->base.resv
HALF_LOCKED2 pkt->heci_pkt_vma->obj->base.resv

drivers/gpu/drm/i915/gt/gen6_engine_cs.c gen6_emit_post_sync_nonzero_flush() -> intel_gt_scratch_offset()

Type Parameter Key Value
PARAM_VALUE 0 gt 4096-ptr_max
PARAM_VALUE 0 gt->scratch 4096-ptr_max
PARAM_VALUE 1 field 128
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &pxp->tee_mutex
HALF_LOCKED2 &vgpu->vgpu_lock
HALF_LOCKED2 __flags
HALF_LOCKED2 pkt->bb_vma->obj->base.resv
HALF_LOCKED2 pkt->heci_pkt_vma->obj->base.resv

drivers/gpu/drm/i915/gt/gen6_engine_cs.c gen7_emit_flush_rcs() -> intel_gt_scratch_offset()

Type Parameter Key Value
PARAM_VALUE 1 field 128
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pxp->tee_mutex
HALF_LOCKED2 &vgpu->vgpu_lock
HALF_LOCKED2 __flags
HALF_LOCKED2 obj->base.resv
HALF_LOCKED2 pkt->bb_vma->obj->base.resv
HALF_LOCKED2 pkt->heci_pkt_vma->obj->base.resv

drivers/gpu/drm/i915/gt/gen2_engine_cs.c gen4_emit_flush_rcs() -> intel_gt_scratch_offset()

Type Parameter Key Value
PARAM_VALUE 1 field 0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pxp->tee_mutex
HALF_LOCKED2 &vgpu->vgpu_lock
HALF_LOCKED2 __flags
HALF_LOCKED2 obj->base.resv
HALF_LOCKED2 pkt->bb_vma->obj->base.resv
HALF_LOCKED2 pkt->heci_pkt_vma->obj->base.resv

drivers/gpu/drm/i915/gt/gen2_engine_cs.c gen4_emit_flush_rcs() -> intel_gt_scratch_offset()

Type Parameter Key Value
PARAM_VALUE 0 gt 4096-ptr_max
PARAM_VALUE 0 gt->scratch 4096-ptr_max
PARAM_VALUE 1 field 0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pxp->tee_mutex
HALF_LOCKED2 &vgpu->vgpu_lock
HALF_LOCKED2 __flags
HALF_LOCKED2 obj->base.resv
HALF_LOCKED2 pkt->bb_vma->obj->base.resv
HALF_LOCKED2 pkt->heci_pkt_vma->obj->base.resv

drivers/gpu/drm/i915/gt/gen2_engine_cs.c i830_emit_bb_start() -> intel_gt_scratch_offset()

Type Parameter Key Value
PARAM_VALUE 1 field 0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pxp->tee_mutex
HALF_LOCKED2 __flags
HALF_LOCKED2 batch->obj->base.resv
HALF_LOCKED2 obj->base.resv
HALF_LOCKED2 pkt->bb_vma->obj->base.resv
HALF_LOCKED2 pkt->heci_pkt_vma->obj->base.resv
HALF_LOCKED2 rpcs->base.resv
HALF_LOCKED2 vma->obj->base.resv

drivers/gpu/drm/i915/gt/intel_lrc.c gen8_emit_flush_coherentl3_wa() -> intel_gt_scratch_offset()

Type Parameter Key Value
PARAM_VALUE 0 gt 4096-ptr_max
PARAM_VALUE 1 field 256
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 gt->uncore->fifo_count 0-127,u32max
LOCK2 wa_ctx->vma->obj->base.resv

drivers/gpu/drm/i915/gt/intel_lrc.c gen8_emit_flush_coherentl3_wa() -> intel_gt_scratch_offset()

Type Parameter Key Value
PARAM_VALUE 0 gt 4096-ptr_max
PARAM_VALUE 0 gt->scratch 4096-ptr_max
PARAM_VALUE 1 field 256
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 gt->uncore->fifo_count 0-127,u32max
LOCK2 wa_ctx->vma->obj->base.resv

drivers/gpu/drm/i915/gt/intel_ring_submission.c load_pd_dir() -> intel_gt_scratch_offset()

Type Parameter Key Value
PARAM_VALUE 1 field 0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &ce->timeline->mutex
HALF_LOCKED2 &wf->mutex

drivers/gpu/drm/i915/gt/intel_ring_submission.c mi_set_context() -> intel_gt_scratch_offset()

Type Parameter Key Value
PARAM_VALUE 0 gt 4096-ptr_max
PARAM_VALUE 1 field 0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &ce->timeline->mutex
HALF_LOCKED2 &wf->mutex