Defined in 1 files as a prototype:
Defined in 2 files as a function:
- drivers/gpu/drm/i915/display/intel_lvds.c, line 87 (as a function)
- drivers/gpu/drm/i915/display/intel_lvds.h, line 23 (as a function)
Referenced in 4 files:
- drivers/gpu/drm/i915/display/intel_dpll.c, line 480
- drivers/gpu/drm/i915/display/intel_lvds.c, line 115
- drivers/gpu/drm/i915/display/intel_pch_display.c, line 94
- drivers/gpu/drm/i915/display/intel_pps.c
Smatch caller information:
drivers/gpu/drm/i915/display/intel_pps.c assert_pps_unlocked() -> intel_lvds_port_enabled()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->info.__device_info | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->pch_type | s32min-(-1),1-s32max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 2 | pipe | 4099254687452131328 |
| DATA_SOURCE | 0 | display | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
drivers/gpu/drm/i915/display/intel_pps.c assert_pps_unlocked() -> intel_lvds_port_enabled()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->info.__device_info | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->pch_type | 0 |
| PARAM_VALUE | 0 | display->platform.cherryview | 0 |
| PARAM_VALUE | 0 | display->platform.valleyview | 0 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 2 | pipe | 4099254687452131328 |
| DATA_SOURCE | 0 | display | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
drivers/gpu/drm/i915/display/intel_dpll.c i9xx_crtc_clock_get() -> intel_lvds_port_enabled()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->platform.i85x | 1 |
| PARAM_VALUE | 2 | pipe | 636451562144743424 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/i915/display/intel_lvds.c intel_lvds_get_hw_state() -> intel_lvds_port_enabled()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->dkl.phy_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->dmc.dmc->dc6_allowed.count | 0-4294967295 |
| PARAM_VALUE | 0 | display->dmc.dmc->dc6_allowed.dc5_start | 0-4294967295 |
| PARAM_VALUE | 0 | display->hotplug.poll_enabled | 0 |
| PARAM_VALUE | 0 | display->hotplug.poll_init_work.entry.next | 4096-ptr_max |
| PARAM_VALUE | 0 | display->hotplug.poll_init_work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->irq.vlv_display_irqs_enabled | 1 |
| PARAM_VALUE | 0 | display->parent | 4096-ptr_max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->power.domains.lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | display->power.domains.power_wells->count | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.power_wells->hw_enabled | 1 |
| PARAM_VALUE | 0 | display->psr_dc5_dc6_wa_work.entry.next | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.enabled | 0 |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->next | 1-u64max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.prev->next | 1-u64max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.prev->prev | 1-u64max |
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 2 | pipe | 1793642323747545088,3469829686150242304,3829289972805517312,5389178130962886656,6005378844698828800,6830598322582867968,8909698421848690688 |
| DATA_SOURCE | 2 | pipe | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | display->dmc.dmc->dc6_allowed.dc5_start | 0-4294967295 |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
drivers/gpu/drm/i915/display/intel_pch_display.c assert_pch_ports_disabled() -> intel_lvds_port_enabled()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->info.__device_info | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->next | 1-u64max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.prev->next | 1-u64max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.prev->prev | 1-u64max |
| PARAM_VALUE | 2 | pipe | 5001095687151620096 |
| DATA_SOURCE | 0 | display | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING |