Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 3 files:
- drivers/gpu/drm/i915/display/intel_bw.c, line 194
- drivers/gpu/drm/i915/display/intel_cdclk.c
- drivers/gpu/drm/i915/display/skl_watermark.c, line 219
Smatch caller information:
drivers/gpu/drm/i915/display/intel_cdclk.c bxt_set_cdclk() -> intel_parent_pcode_request()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->cdclk.funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | display->cdclk.funcs->set_cdclk | 0,981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232 |
| PARAM_VALUE | 0 | display->drm | 0,4096-ptr_max |
| PARAM_VALUE | 0 | display->parent->vlv_iosf | 0,197119610173992960 |
| PARAM_VALUE | 0 | display->platform.dg2 | 0 |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->next | 1-u64max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.prev->next | 1-u64max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.prev->prev | 1-u64max |
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 1 | mbox | 7 |
| PARAM_VALUE | 2 | request | 3 |
| PARAM_VALUE | 3 | reply_mask | 1 |
| PARAM_VALUE | 4 | reply | 1 |
| PARAM_VALUE | 5 | timeout_base_ms | 3 |
| BUF_SIZE | 0 | display | (-1),8128 |
| BUF_SIZE | 0 | display | (-1),8128 |
| DATA_SOURCE | 0 | display | $0 |
| STR_LEN | 0 | display | (-1),21-22 |
| STR_LEN | 0 | display | (-1),21-22 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | display->cdclk.hw.joined_mbus | 0-1 |
| HOST_DATA | 0 | display->drm->mode_config.object_idr.idr_rt.xa_flags | 0-u32max |
| HOST_DATA | 0 | display->power.chv_phy_control | 0-u32max[c] |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
| HOST_DATA | 0 | display->state.bxt_phy_grc | 0-u32max |
| NO_OVERFLOW_SIMPLE | 0 | display->drm->num_crtcs | |
| HALF_LOCKED2 | 0 | &display->gmbus.mutex |
drivers/gpu/drm/i915/display/intel_cdclk.c intel_pcode_notify() -> intel_parent_pcode_request()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->platform.dg2 | 1 |
| PARAM_VALUE | 1 | mbox | 7 |
| PARAM_VALUE | 3 | reply_mask | 1 |
| PARAM_VALUE | 4 | reply | 1 |
| PARAM_VALUE | 5 | timeout_base_ms | 3 |
| DATA_SOURCE | 0 | display | $0 |
| BIT_INFO | 2 | request | 0x3,0xffffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_cdclk.c skl_set_cdclk() -> intel_parent_pcode_request()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->cdclk.funcs->set_cdclk | 0,981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232 |
| PARAM_VALUE | 0 | display->drm | 0,4096-ptr_max |
| PARAM_VALUE | 0 | display->parent->vlv_iosf | 0,197119610173992960 |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->next | 1-u64max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.prev->next | 1-u64max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.prev->prev | 1-u64max |
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 1 | mbox | 7 |
| PARAM_VALUE | 2 | request | 3 |
| PARAM_VALUE | 3 | reply_mask | 1 |
| PARAM_VALUE | 4 | reply | 1 |
| PARAM_VALUE | 5 | timeout_base_ms | 3 |
| BUF_SIZE | 0 | display | (-1),8128 |
| BUF_SIZE | 0 | display | (-1),8128 |
| DATA_SOURCE | 0 | display | $0 |
| STR_LEN | 0 | display | (-1),21-22 |
| STR_LEN | 0 | display | (-1),21-22 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | display->cdclk.hw.cdclk | 0-16[c] |
| HOST_DATA | 0 | display->cdclk.hw.joined_mbus | 0-1 |
| HOST_DATA | 0 | display->drm->mode_config.object_idr.idr_rt.xa_flags | 0-u32max |
| HOST_DATA | 0 | display->power.chv_phy_control | 0-u32max[c] |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
| HOST_DATA | 0 | display->state.bxt_phy_grc | 0-u32max |
| NO_OVERFLOW_SIMPLE | 0 | display->drm->num_crtcs | |
| HALF_LOCKED2 | 0 | &display->gmbus.mutex |
drivers/gpu/drm/i915/display/skl_watermark.c skl_sagv_disable() -> intel_parent_pcode_request()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->cdclk.table->cdclk | 0,79200,144000,151200,153600,158400,163200,172800,176000,176400,179200,180000,192000,201600,204000,211200,226800,230400,244800,249600,252000,268800,277200,285600,288000,302400,307200,312000,316800,324000,326400-4294967295 |
| PARAM_VALUE | 0 | display->cdclk.table->ratio | 0,9-10,14-41,46,50,52,54,58,60,64-65,68,92,108,116,136 |
| PARAM_VALUE | 0 | display->cdclk.table->refclk | 0,19200,24000,24400,38400 |
| PARAM_VALUE | 0 | display->cdclk.table->waveform | 0,6,34952,37448,42148,42314,43604,43690,44378,46774,56246,61166,63454,65278,65534-u16max |
| PARAM_VALUE | 0 | display->drm | 0,4096-ptr_max |
| PARAM_VALUE | 0 | display->parent->irq | 5062596649199198208 |
| PARAM_VALUE | 0 | display->parent->vlv_iosf | 197119610173992960 |
| PARAM_VALUE | 0 | display->platform.broxton | 0 |
| PARAM_VALUE | 0 | display->platform.geminilake | 0 |
| PARAM_VALUE | 0 | display->sagv.status | 0,2,4-u32max |
| PARAM_VALUE | 0 | *display->power.chv_phy_assert | 0-1 |
| PARAM_VALUE | 1 | mbox | 33 |
| PARAM_VALUE | 2 | request | 0 |
| PARAM_VALUE | 3 | reply_mask | 1 |
| PARAM_VALUE | 4 | reply | 1 |
| PARAM_VALUE | 5 | timeout_base_ms | 1 |
| DATA_SOURCE | 0 | display | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | display->cdclk.hw.joined_mbus | 0 |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-1073741835 |
| NO_OVERFLOW_SIMPLE | 0 | display->drm->num_crtcs |
drivers/gpu/drm/i915/display/intel_bw.c icl_pcode_restrict_qgv_points() -> intel_parent_pcode_request()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->bw.obj.funcs->atomic_destroy_state | 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880 |
| PARAM_VALUE | 0 | display->bw.obj.funcs->atomic_duplicate_state | 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768 |
| PARAM_VALUE | 0 | display->cdclk.obj.funcs->atomic_destroy_state | 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880 |
| PARAM_VALUE | 0 | display->cdclk.obj.funcs->atomic_duplicate_state | 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768 |
| PARAM_VALUE | 0 | display->dbuf.obj.funcs->atomic_destroy_state | 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880 |
| PARAM_VALUE | 0 | display->dbuf.obj.funcs->atomic_duplicate_state | 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768 |
| PARAM_VALUE | 0 | display->dbuf_bw.obj.funcs->atomic_destroy_state | 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880 |
| PARAM_VALUE | 0 | display->dbuf_bw.obj.funcs->atomic_duplicate_state | 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768 |
| PARAM_VALUE | 0 | display->drm | 0,4096-ptr_max |
| PARAM_VALUE | 0 | display->drm->mode_config.funcs->atomic_commit | 0,1709437739929436160,3385958169767186432,9025212985888776192 |
| PARAM_VALUE | 0 | display->drm->mode_config.funcs->atomic_state_alloc | 0,4313866966076465152,8746944527109378048 |
| PARAM_VALUE | 0 | display->drm->mode_config.funcs->atomic_state_clear | 0,3327168810821279744,3688275810139275264 |
| PARAM_VALUE | 0 | display->drm->mode_config.funcs->atomic_state_free | 0,358897174564036608,2978086218190217216 |
| PARAM_VALUE | 0 | display->drm->mode_config.funcs->get_format_info | 0,4744930813722337280,7691603805021310976 |
| PARAM_VALUE | 0 | display->drm->mode_config.helper_private->atomic_commit_setup | 0,2854509176089305088,4835567830784204800,7680721074952196096 |
| PARAM_VALUE | 0 | *display->bw.peakbw | 0-4294967295 |
| PARAM_VALUE | 0 | *display->bw.psf_bw | 0-4294967295 |
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 0 | *display->power.chv_phy_assert | 0-1 |
| PARAM_VALUE | 1 | mbox | 14 |
| PARAM_VALUE | 3 | reply_mask | 15 |
| PARAM_VALUE | 4 | reply | 0-15 |
| PARAM_VALUE | 5 | timeout_base_ms | 1 |
| BUF_SIZE | 0 | display->hotplug.dp_wq | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.cleanup | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.flip | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.modeset | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.unordered | (-1),512,528-8720 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 2 | request | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | display->cdclk.hw.joined_mbus | 0-1 |
| HOST_DATA | 0 | display->drm->mode_config.object_idr.idr_rt.xa_flags | 0-u32max |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-1073741835 |
| NO_OVERFLOW_SIMPLE | 0 | display->drm->num_crtcs |