intel_parent_pcode_write identifier - Linux source code next-20260811

Projects

linux

Versions

FIXME
- FIXME
  - next-20260811

Defined in 1 files as a prototype:

drivers/gpu/drm/i915/display/intel_parent.h, line 120 (as a prototype)

Defined in 1 files as a function:

drivers/gpu/drm/i915/display/intel_parent.c, line 294 (as a function)

Referenced in 6 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_cdclk.c bdw_set_cdclk() -> intel_parent_pcode_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs->set_cdclk	981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232
PARAM_VALUE	0	display->drm	0,4096-ptr_max
PARAM_VALUE	0	display->gmbus.mutex.dep_map->name	0-255
PARAM_VALUE	0	display->gmbus.mutex.first_waiter	0,4096-ptr_max
PARAM_VALUE	0	display->gmbus.mutex.first_waiter->list.prev->next	5159360019465732096
PARAM_VALUE	0	display->gmbus.mutex.first_waiter->list.prev->prev	5159360019465732096
PARAM_VALUE	0	display->gmbus.mutex.osq.tail.counter	0-s32max
PARAM_VALUE	0	display->gmbus.mutex.wait_lock.dep_map->name	0-255
PARAM_VALUE	0	display->gmbus.mutex.wait_lock.owner	(-1)
PARAM_VALUE	0	display->gmbus.mutex.wait_lock.owner_cpu	u32max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->wl.taken	1
PARAM_VALUE	0	display->wl.work->timer->entry.pprev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->prev	1-u64max
PARAM_VALUE	1	mbox	24
PARAM_VALUE	2	val	0
DATA_SOURCE	0	display	$0
STR_LEN	0	display	21-22
STR_LEN	0	display	21-22
RX_PATH
TASK_NOT_RUNNING
LOCK2	0	&display->gmbus.mutex
HALF_LOCKED2		&pool->lock
TYPE_LOCK		(struct intel_display)->gmbus.mutex

drivers/gpu/drm/i915/display/intel_cdclk.c bdw_set_cdclk() -> intel_parent_pcode_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs->set_cdclk	981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232
PARAM_VALUE	0	display->drm	0,4096-ptr_max
PARAM_VALUE	0	display->gmbus.mutex.dep_map->name	0-255
PARAM_VALUE	0	display->gmbus.mutex.first_waiter	0,4096-ptr_max
PARAM_VALUE	0	display->gmbus.mutex.first_waiter->list.prev->next	5159360019465732096
PARAM_VALUE	0	display->gmbus.mutex.first_waiter->list.prev->prev	5159360019465732096
PARAM_VALUE	0	display->gmbus.mutex.osq.tail.counter	0-s32max
PARAM_VALUE	0	display->gmbus.mutex.wait_lock.dep_map->name	0-255
PARAM_VALUE	0	display->gmbus.mutex.wait_lock.owner	(-1)
PARAM_VALUE	0	display->gmbus.mutex.wait_lock.owner_cpu	u32max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->parent	4096-ptr_max
PARAM_VALUE	0	display->parent->pcode	4096-ptr_max
PARAM_VALUE	0	display->parent->pcode->write	4096-ptr_max
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->prev	1-u64max
PARAM_VALUE	1	mbox	23
DATA_SOURCE	0	display	$0
STR_LEN	0	display	21-22
STR_LEN	0	display	21-22
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2	0	&display->gmbus.mutex
HALF_LOCKED2		&pool->lock
TYPE_LOCK		(struct intel_display)->gmbus.mutex

drivers/gpu/drm/i915/display/intel_cdclk.c bxt_set_cdclk() -> intel_parent_pcode_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs->set_cdclk	0,981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232
PARAM_VALUE	0	display->cdclk.table->waveform	0,34952,37448,42148,42314,43604,43690,44378,46774,56246,61166,63454,65278,65534-u16max
PARAM_VALUE	0	display->drm	0,4096-ptr_max
PARAM_VALUE	0	display->drm->huge_mnt->mnt_sb->s_cop->inode_info_offs	1632,1720,2632,2648
PARAM_VALUE	0	display->info.__device_info	4096-ptr_max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->parent	4096-ptr_max
PARAM_VALUE	0	display->parent->pcode	4096-ptr_max
PARAM_VALUE	0	display->parent->pcode->request	4096-ptr_max
PARAM_VALUE	0	display->parent->pcode->write	4096-ptr_max
PARAM_VALUE	0	display->parent->vlv_iosf	0,197119610173992960
PARAM_VALUE	0	display->platform.dg2	0
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->prev	1-u64max
PARAM_VALUE	0	*display->irq.pipestat_irq_mask	0-4294967295
PARAM_VALUE	1	mbox	7
BUF_SIZE	0	display	(-1),8128
BUF_SIZE	0	display	(-1),8128
DATA_SOURCE	0	display	$0
STR_LEN	0	display	(-1),21-22
STR_LEN	0	display	(-1),21-22
RX_PATH
TASK_NOT_RUNNING
HOST_DATA	0	display->cdclk.hw.joined_mbus	0-1
HOST_DATA	0	display->drm->mode_config.object_idr.idr_rt.xa_flags	0-u32max
HOST_DATA	0	display->power.chv_phy_control	0-u32max[c]
HOST_DATA	0	display->power.domains.dc_state	0-u32max
HOST_DATA	0	display->state.bxt_phy_grc	0-u32max
NO_OVERFLOW_SIMPLE	0	display->drm->num_crtcs
HALF_LOCKED2	0	&display->gmbus.mutex

drivers/gpu/drm/i915/display/intel_cdclk.c skl_set_cdclk() -> intel_parent_pcode_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs->set_cdclk	0,981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232
PARAM_VALUE	0	display->drm	0,4096-ptr_max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->parent	4096-ptr_max
PARAM_VALUE	0	display->parent->pcode	4096-ptr_max
PARAM_VALUE	0	display->parent->pcode->request	4096-ptr_max
PARAM_VALUE	0	display->parent->vlv_iosf	0,197119610173992960
PARAM_VALUE	0	display->wl.work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->prev	1-u64max
PARAM_VALUE	0	*display->irq.pipestat_irq_mask	0-4294967295
PARAM_VALUE	1	mbox	7
BUF_SIZE	0	display	(-1),8128
BUF_SIZE	0	display	(-1),8128
DATA_SOURCE	0	display	$0
STR_LEN	0	display	(-1),21-22
STR_LEN	0	display	(-1),21-22
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	display->cdclk.hw.cdclk	0-16[c]
HOST_DATA	0	display->cdclk.hw.joined_mbus	0-1
HOST_DATA	0	display->cdclk.max_cdclk_freq	1-16[c]
HOST_DATA	0	display->drm->mode_config.object_idr.idr_rt.xa_flags	0-u32max
HOST_DATA	0	display->power.chv_phy_control	0-u32max[c]
HOST_DATA	0	display->power.domains.dc_state	0-u32max
HOST_DATA	0	display->state.bxt_phy_grc	0-u32max
NO_OVERFLOW_SIMPLE	0	display->drm->num_crtcs
HALF_LOCKED2	0	&display->gmbus.mutex

drivers/gpu/drm/i915/display/hsw_ips.c hsw_ips_disable() -> intel_parent_pcode_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->platform.broadwell	1
PARAM_VALUE	1	mbox	25
PARAM_VALUE	2	val	0
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/hsw_ips.c hsw_ips_enable() -> intel_parent_pcode_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->platform.broadwell	1
PARAM_VALUE	1	mbox	25
PARAM_VALUE	2	val	3221225472,3221225488
BIT_INFO	2	val	0xc0000000,0xc0000010
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&attr->mutex
HALF_LOCKED2		&crtc->base.mutex.mutex

drivers/gpu/drm/i915/display/skl_watermark.c skl_sagv_enable() -> intel_parent_pcode_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->drm	0,4096-ptr_max
PARAM_VALUE	0	display->platform.broxton	0
PARAM_VALUE	0	display->platform.geminilake	0
PARAM_VALUE	0	display->sagv.status	0-1,4-u32max
PARAM_VALUE	1	mbox	33
PARAM_VALUE	2	val	3
DATA_SOURCE	0	display	$0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&pool->lock

drivers/gpu/drm/i915/display/intel_display_power.c hsw_write_dcomp() -> intel_parent_pcode_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->cdclk.table->waveform	0,6,34952,37448,42148,42314,43604,43690,44378,46774,56246,61166,63454,65278,65534-u16max
PARAM_VALUE	0	display->drm	0,4096-ptr_max
PARAM_VALUE	0	display->drm->huge_mnt->mnt_sb->s_cop->inode_info_offs	1632,1720,1808,2632,2648
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->parent	4096-ptr_max
PARAM_VALUE	0	display->platform.broxton	0
PARAM_VALUE	0	display->platform.geminilake	0
PARAM_VALUE	0	display->platform.haswell	1
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	*display->irq.pipestat_irq_mask	0-4294967295
PARAM_VALUE	0	*display->power.chv_phy_assert	0-1
PARAM_VALUE	1	mbox	17
DATA_SOURCE	0	display	$0
DATA_SOURCE	2	val	$1
RX_PATH
TASK_NOT_RUNNING
HOST_DATA	0	display->cdclk.hw.joined_mbus	0-1
HOST_DATA	0	display->drm->mode_config.connector_ida.xa.xa_flags	67108869
HOST_DATA	0	display->drm->mode_config.object_idr.idr_rt.xa_flags	0,4-u32max
HOST_DATA	0	display->drm->mode_config.tile_idr.idr_rt.xa_flags	0,67108864-u32max
HOST_DATA	0	display->drm->num_crtcs	2[c]
HOST_DATA	0	display->power.domains.dc_state	0-1073741835
HOST_DATA	2	val	0-u32max

drivers/gpu/drm/i915/display/intel_hdcp.c intel_hdcp_load_keys() -> intel_parent_pcode_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->drm	0,4096-ptr_max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->parent	4096-ptr_max
PARAM_VALUE	0	display->platform.broxton	0
PARAM_VALUE	0	display->wl.taken	1
PARAM_VALUE	0	display->wl.work->timer->entry.pprev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->prev	1-u64max
PARAM_VALUE	1	mbox	5
PARAM_VALUE	2	val	1
CAPPED_DATA	0	display->power.domains.power_well_count	1
DATA_SOURCE	0	display	$0
RX_PATH
TASK_NOT_RUNNING
LOCK2		&dig_port->hdcp.mutex
LOCK2		&hdcp->mutex
HALF_LOCKED2		&pool->lock
TYPE_LOCK		(struct intel_digital_port)->hdcp.mutex
TYPE_LOCK		(struct intel_hdcp)->mutex

drivers/gpu/drm/i915/display/intel_display_power_well.c icl_tc_cold_exit() -> intel_parent_pcode_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs->set_cdclk	0,981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232
PARAM_VALUE	0	display->cdclk.table->cdclk	0,79200,144000,151200,153600,158400,163200,172800,176000,176400,179200,180000,192000,201600,204000,211200,226800,230400,244800,249600,252000,268800,277200,285600,288000,302400,307200,312000,316800,324000,326400-4294967295
PARAM_VALUE	0	display->cdclk.table->ratio	0,9-10,14-41,46,50,52,54,58,60,64-65,68,92,108,116,136
PARAM_VALUE	0	display->cdclk.table->refclk	0,19200,24000,24400,38400
PARAM_VALUE	0	display->cdclk.table->waveform	0,6,34952,37448,42148,42314,43604,43690,44378,46774,56246,61166,63454,65278,65534-u16max
PARAM_VALUE	0	display->dmc.dmc->max_fw_size	0-4294967295
PARAM_VALUE	0	display->dmc.dmc->version	0-4294967295
PARAM_VALUE	0	display->dmc.wakeref->alloc_stack_handle	0-4294967295
PARAM_VALUE	0	display->dmc.wakeref->dead	0-1
PARAM_VALUE	0	display->dmc.wakeref->free_stack_handle	0-4294967295
PARAM_VALUE	0	display->dpll.mgr->compare_hw_state	4304445909437353984,5589390013801357312,7199724579178258432,7292826417019408384,7481167222828003328,8665324935750119424,9182544845536616448
PARAM_VALUE	0	display->dpll.mgr->compute_dplls	3278772287333720064,6060912680081088512,6216086186862542848,8471094383317381120,8614942105147809792,8986272695562289152,9022440569105731584
PARAM_VALUE	0	display->dpll.mgr->dump_hw_state	215385455013437440,1582718613836124160,1835901918492803072,4180342879337267200,5224410778052669440,6129327221765451776,9060799253560999936
PARAM_VALUE	0	display->dpll.mgr->get_dplls	204657350407954432,3936139357776248832,5334416601241935872,6868165492758421504,8361789056745369600,8976139343680507904
PARAM_VALUE	0	display->dpll.mgr->put_dplls	1769282744316076032,3032660624085295104
PARAM_VALUE	0	display->dpll.mgr->update_active_dpll	0,3893979238484942848
PARAM_VALUE	0	display->dpll.mgr->update_ref_clks	0,3536181015747457024,6167602680813006848,6325637718150250496,6483930178044678144
PARAM_VALUE	0	display->drm	4096-ptr_max
PARAM_VALUE	0	display->drm->huge_mnt->mnt_sb->s_cop->inode_info_offs	1632,1640,1808,1816,2632,2640,2648,2704,2712
PARAM_VALUE	0	display->drm->mode_config.helper_private->atomic_commit_tail	0,113,234517204248432640,264416658693812224,1002985563129995264,1135616218159751168,1435312838172803072,1559742614509715456,1682444203744997376,2792895115794366464,3649211429048074240,4264110321136541696,4348468181405868032-s64max
PARAM_VALUE	0	display->hotplug.dp_wq->flags	0-4294967295
PARAM_VALUE	0	display->hotplug.dp_wq->flush_color	s32min-s32max
PARAM_VALUE	0	display->hotplug.dp_wq->nr_drainers	s32min-s32max
PARAM_VALUE	0	display->hotplug.dp_wq->work_color	s32min-s32max
PARAM_VALUE	0	display->hotplug.dp_wq->wq_dev	0-s64max
PARAM_VALUE	0	display->opregion->swsci_gbda_sub_functions	0-4294967295
PARAM_VALUE	0	display->opregion->vbt	0-s64max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->parent->pcode	4096-ptr_max
PARAM_VALUE	0	display->parent->rpm	1303590034781167616
PARAM_VALUE	0	display->parent->vlv_iosf	197119610173992960
PARAM_VALUE	0	display->power.domains.async_put_work.wq->dfl_pwq	0-s64max
PARAM_VALUE	0	display->power.domains.async_put_work.wq->saved_max_active	s32min-s32max
PARAM_VALUE	0	display->power.domains.async_put_work.wq->saved_min_active	s32min-s32max
PARAM_VALUE	0	display->power.domains.init_wakeref->alloc_stack_handle	0-4294967295
PARAM_VALUE	0	display->power.domains.init_wakeref->dead	0-1
PARAM_VALUE	0	display->power.domains.init_wakeref->free_stack_handle	0-4294967295
PARAM_VALUE	0	display->power.domains.lock.first_waiter->list.prev->next	5159360019465732096
PARAM_VALUE	0	display->power.domains.lock.osq.tail.counter	0-s32max
PARAM_VALUE	0	display->power.domains.lock.wait_lock.owner	(-1)
PARAM_VALUE	0	display->power.domains.lock.wait_lock.owner_cpu	u32max
PARAM_VALUE	0	display->power.domains.power_wells->desc->enable_timeout	0,500
PARAM_VALUE	0	display->power.domains.power_wells->desc->irq_pipe_mask	0-2,4,6,8
PARAM_VALUE	0	display->restore.reset_ctx.ww_ctx.ww_class->acquire_name	182095512647520256,1459202010597384192,2042222122760065024,2953085416145920000,6123211227480948736,8230199826601394176,8290753657026781184
PARAM_VALUE	0	display->restore.reset_ctx.ww_ctx.ww_class->is_wait_die	0-1
PARAM_VALUE	0	display->restore.reset_ctx.ww_ctx.ww_class->mutex_name	3691132625150517248,4065682205113294848,5134360359185924096,5357946803847356416,5603286808893427712,6920087151235571712,8730023023955308544
PARAM_VALUE	0	display->wl.taken	1
PARAM_VALUE	0	display->wl.work->timer->entry.pprev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->wm.funcs->atomic_update_watermarks	0,241866399159836672
PARAM_VALUE	0	display->wm.funcs->compute_global_watermarks	0,7679025112587603968
PARAM_VALUE	0	display->wm.funcs->compute_watermarks	0,663047380929499136,4718310602505961472,7447224825039265792,8278299763477639168
PARAM_VALUE	0	display->wm.funcs->get_hw_state	0,1372658440782848000,6903309568198033408,7899623770445606912,8633453788894511104
PARAM_VALUE	0	display->wm.funcs->initial_watermarks	0,318382624811003904,2077638626766659584,4361408001915691008
PARAM_VALUE	0	display->wm.funcs->optimize_watermarks	0,136016925988110336,2676780419539894272,6733336501198520320
PARAM_VALUE	0	display->wm.funcs->sanitize	0,3771904337417297920,8756858967241641984,9118998679592730624
PARAM_VALUE	0	display->wm.funcs->update_wm	0,2900677620984037376,5075417898438156288,6224038869724659712,6233422041516032000
PARAM_VALUE	0	display->wq.cleanup->flags	0-4294967295
PARAM_VALUE	0	display->wq.cleanup->flush_color	s32min-s32max
PARAM_VALUE	0	display->wq.cleanup->nr_drainers	s32min-s32max
PARAM_VALUE	0	display->wq.cleanup->work_color	s32min-s32max
PARAM_VALUE	0	display->wq.cleanup->wq_dev	0-s64max
PARAM_VALUE	0	display->wq.flip->flags	0-4294967295
PARAM_VALUE	0	display->wq.flip->flush_color	s32min-s32max
PARAM_VALUE	0	display->wq.flip->nr_drainers	s32min-s32max
PARAM_VALUE	0	display->wq.flip->work_color	s32min-s32max
PARAM_VALUE	0	display->wq.flip->wq_dev	0-s64max
PARAM_VALUE	0	display->wq.modeset->flags	0-4294967295
PARAM_VALUE	0	display->wq.modeset->flush_color	s32min-s32max
PARAM_VALUE	0	display->wq.modeset->nr_drainers	s32min-s32max
PARAM_VALUE	0	display->wq.modeset->work_color	s32min-s32max
PARAM_VALUE	0	display->wq.modeset->wq_dev	0-s64max
PARAM_VALUE	0	display->wq.unordered->flags	0-4294967295
PARAM_VALUE	0	display->wq.unordered->flush_color	s32min-s32max
PARAM_VALUE	0	display->wq.unordered->nr_drainers	s32min-s32max
PARAM_VALUE	0	display->wq.unordered->work_color	s32min-s32max
PARAM_VALUE	0	display->wq.unordered->wq_dev	0-s64max
PARAM_VALUE	0	*display->irq.pipestat_irq_mask	0-4294967295
PARAM_VALUE	1	mbox	18
PARAM_VALUE	2	val	0
BUF_SIZE	0	display->hotplug.dp_wq	(-1),512,528-8720
BUF_SIZE	0	display->wq.cleanup	(-1),512,528-8720
BUF_SIZE	0	display->wq.flip	(-1),512,528-8720
BUF_SIZE	0	display->wq.modeset	(-1),512,528-8720
BUF_SIZE	0	display->wq.unordered	(-1),512,528-8720
DATA_SOURCE	0	display	$0
STR_LEN	0	display	(-1),21-22
STR_LEN	0	display	(-1),21-22
RX_PATH
TASK_NOT_RUNNING
HOST_DATA	0	display->cdclk.hw.cdclk	0-39168016[c]
HOST_DATA	0	display->cdclk.hw.joined_mbus	0-1
HOST_DATA	0	display->cdclk.hw.voltage_level	0-31[c]
HOST_DATA	0	display->cdclk.max_cdclk_freq	2-39168016[c]
HOST_DATA	0	display->drm->mode_config.object_idr.idr_rt.xa_flags	0,4-u32max
HOST_DATA	0	display->drm->mode_config.tile_idr.idr_rt.xa_flags	0,67108864-u32max
HOST_DATA	0	display->fdi.pll_freq	20000-2570000[c]
HOST_DATA	0	display->fdi.rx_config	0,32768-98304[c]
HOST_DATA	0	display->power.chv_phy_control	0-u32max[c]
HOST_DATA	0	display->power.domains.dc_state	0-u32max
HOST_DATA	0	display->restore.saveGCDGMBUS	0-u16max
HOST_DATA	0	display->state.bxt_phy_grc	0-u32max
HOST_DATA	0	display->vbt.lvds_use_ssc	0-1
HOST_DATA	0	display->wm.g4x.cxsr	0-1
HOST_DATA	0	display->wm.g4x.hpll.cursor	0-63[c]
HOST_DATA	0	display->wm.g4x.hpll.fbc	0-15[c]
HOST_DATA	0	display->wm.g4x.hpll.plane	0-511[c]
HOST_DATA	0	display->wm.g4x.sr.cursor	0-63[c]
HOST_DATA	0	display->wm.g4x.sr.fbc	0-7[c]
HOST_DATA	0	display->wm.g4x.sr.plane	0-511
HOST_DATA	0	display->wm.vlv.cxsr	0-1
HOST_DATA	0	display->wm.vlv.sr.cursor	0-63[c]
HOST_DATA	0	display->wm.vlv.sr.plane	0-2047[c]
NO_OVERFLOW_SIMPLE	0	display->drm->mode_config.num_colorop
NO_OVERFLOW_SIMPLE	0	display->drm->mode_config.num_crtc
NO_OVERFLOW_SIMPLE	0	display->drm->mode_config.num_total_plane
NO_OVERFLOW_SIMPLE	0	display->drm->num_crtcs
NO_OVERFLOW_SIMPLE	0	display->hotplug.dp_wq->rescuer->task->dl.dl_runtime
NO_OVERFLOW_SIMPLE	0	display->wq.cleanup->rescuer->task->dl.dl_runtime
NO_OVERFLOW_SIMPLE	0	display->wq.flip->rescuer->task->dl.dl_runtime
NO_OVERFLOW_SIMPLE	0	display->wq.modeset->rescuer->task->dl.dl_runtime
NO_OVERFLOW_SIMPLE	0	display->wq.unordered->rescuer->task->dl.dl_runtime
LOCK2		&power_domains->lock
HALF_LOCKED2	0	&display->dpll.lock
HALF_LOCKED2	0	&display->drm->mode_config.connection_mutex
HALF_LOCKED2	0	&display->drm->mode_config.mutex
HALF_LOCKED2	0	&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock