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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_display_power.c __intel_display_power_init_hw() -> intel_pch_reset_handshake()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->params.enable_dmc_wl 0-1
PARAM_VALUE 0 display->parent->vlv_iosf 0,197119610173992960
PARAM_VALUE 0 display->platform.broxton 0
PARAM_VALUE 0 display->platform.cherryview 0
PARAM_VALUE 0 display->platform.geminilake 0
PARAM_VALUE 0 display->platform.valleyview 0
PARAM_VALUE 0 display->power.domains.initializing 1
PARAM_VALUE 0 display->restore.reset_ctx.ww_ctx.ww_class->is_wait_die 0-1
PARAM_VALUE 0 display->wl.taken 1
PARAM_VALUE 0 display->wl.work->timer->entry.pprev 4096-ptr_max
PARAM_VALUE 0 display->wl.work.timer.entry->pprev 4096-ptr_max
PARAM_VALUE 0 display->wl.work.work.entry.next->prev 4096-ptr_max
PARAM_VALUE 0 *display->bw.peakbw 0-4294967295
PARAM_VALUE 0 *display->bw.psf_bw 0-4294967295
BUF_SIZE 0 display (-1),8416
BUF_SIZE 0 display (-1),8416
DATA_SOURCE 0 display $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 display->cdclk.hw.joined_mbus 0-1
HOST_DATA 0 display->power.domains.dc_state 0-u32max
NO_OVERFLOW_SIMPLE 0 display->drm->num_crtcs

drivers/gpu/drm/i915/display/intel_display_power.c __intel_display_power_init_hw() -> intel_pch_reset_handshake()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent->vlv_iosf 0,197119610173992960
PARAM_VALUE 0 display->platform.broadwell 0
PARAM_VALUE 0 display->platform.broxton 0
PARAM_VALUE 0 display->platform.cherryview 0
PARAM_VALUE 0 display->platform.geminilake 0
PARAM_VALUE 0 display->platform.haswell 0
PARAM_VALUE 0 display->platform.ivybridge 1
PARAM_VALUE 0 display->platform.valleyview 0
PARAM_VALUE 0 display->power.domains.initializing 1
PARAM_VALUE 0 display->restore.reset_ctx.ww_ctx.ww_class->is_wait_die 0-1
PARAM_VALUE 0 *display->bw.peakbw 0-4294967295
PARAM_VALUE 0 *display->bw.psf_bw 0-4294967295
BUF_SIZE 0 display (-1),8416
BUF_SIZE 0 display (-1),8416
DATA_SOURCE 0 display $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 display->cdclk.hw.joined_mbus 0-1
HOST_DATA 0 display->power.domains.dc_state 0-u32max
NO_OVERFLOW_SIMPLE 0 display->drm->num_crtcs

drivers/gpu/drm/i915/display/intel_display_power.c bxt_display_core_init() -> intel_pch_reset_handshake()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->drm->mode_config.helper_private->atomic_commit_tail 0,113,234517204248432640,264416658693812224,1002985563129995264,1135616218159751168,1435312838172803072,1559742614509715456,1682444203744997376,2792895115794366464,3649211429048074240,4264110321136541696,4348468181405868032-s64max
PARAM_VALUE 0 *display->bw.peakbw 0-4294967295
PARAM_VALUE 0 *display->bw.psf_bw 0-4294967295
PARAM_VALUE 0 *display->irq.pipestat_irq_mask 0-4294967295
PARAM_VALUE 1 enable 0
DATA_SOURCE 0 display $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 display->cdclk.hw.joined_mbus 0-1
HOST_DATA 0 display->dmc.dmc->dc6_allowed.dc5_start 0-4294967295
HOST_DATA 0 display->power.chv_phy_control 0-u32max[c]
HOST_DATA 0 display->power.domains.dc_state 0-u32max
HOST_DATA 0 display->state.bxt_phy_grc 0-u32max
NO_OVERFLOW_SIMPLE 0 display->drm->num_crtcs

drivers/gpu/drm/i915/display/intel_display_power.c icl_display_core_init() -> intel_pch_reset_handshake()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->drm->mode_config.helper_private->atomic_commit_tail 0,113,234517204248432640,264416658693812224,1002985563129995264,1135616218159751168,1435312838172803072,1559742614509715456,1682444203744997376,2792895115794366464,3649211429048074240,4264110321136541696,4348468181405868032-s64max
PARAM_VALUE 0 *display->bw.peakbw 0-4294967295
PARAM_VALUE 0 *display->bw.psf_bw 0-4294967295
PARAM_VALUE 0 *display->irq.pipestat_irq_mask 0-4294967295
DATA_SOURCE 0 display $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 display->cdclk.hw.joined_mbus 0-1
HOST_DATA 0 display->dmc.dmc->dc6_allowed.dc5_start 0-4294967295
HOST_DATA 0 display->power.chv_phy_control 0-u32max[c]
HOST_DATA 0 display->power.domains.dc_state 0-u32max
HOST_DATA 0 display->state.bxt_phy_grc 0-u32max
NO_OVERFLOW_SIMPLE 0 display->drm->num_crtcs

drivers/gpu/drm/i915/display/intel_display_power.c skl_display_core_init() -> intel_pch_reset_handshake()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->drm->mode_config.helper_private->atomic_commit_tail 0,113,234517204248432640,264416658693812224,1002985563129995264,1135616218159751168,1435312838172803072,1559742614509715456,1682444203744997376,2792895115794366464,3649211429048074240,4264110321136541696,4348468181405868032-s64max
PARAM_VALUE 0 display->platform.broxton 0
PARAM_VALUE 0 display->platform.geminilake 0
PARAM_VALUE 0 display->power.domains.initializing 1
PARAM_VALUE 0 *display->bw.peakbw 0-4294967295
PARAM_VALUE 0 *display->bw.psf_bw 0-4294967295
DATA_SOURCE 0 display $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 display->cdclk.hw.joined_mbus 0-1
HOST_DATA 0 display->dmc.dmc->dc6_allowed.dc5_start 0-4294967295
HOST_DATA 0 display->power.domains.dc_state 0-u32max
HOST_DATA 0 display->state.bxt_phy_grc 0-u32max
NO_OVERFLOW_SIMPLE 0 display->drm->num_crtcs